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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    STREAM memory benchmark. Elbrus 8C 1200 Mhz (4 CPU server board, total 32 Cores, DDR3-1600), 1 thread: ------------------------------------------------------------- STREAM version $Revision: 5.10 $ ------------------------------------------------------------- This system uses 8 bytes per array...
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Elbrus generaton cpus presentation Information about new and future models.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    2X CPU Server Motherboard for Elbrus-16C (14 layers). 16 DDR4 slots per one CPU (8 channels). They supposed to build 4X CPU board but form-factor won't be standard.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Price depends on baked chips. For 10k+ CPUs (For Elbrus CPU + KPI2 southbridge) price can be reduced twice. Also TSMC is overloaded, you have to wait about 6-9 months to receive your ordered chips.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    If you can read Russian or you can use automatic translator, so read here: https://www.linux.org.ru/news/hardware/16021332 I don't know how many board instances can be soldered, but at this moment MCST has limited number of cpu's. And we estimate price about $2000 per one board.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Look for IcepeakITX ELBRUS-8CB.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Hi. Yes, we're enthusiast team, we research e2k architecture, its assembly language, trying to port an existing open source software (Mostly C/C++ projects [But any Python, JS, PHP, Java, C# work Ok too])to e2k architecture. Maybe someone will be interested. Everyone can start from here...
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    C source and assembly output examples #include <stdio.h> #include <math.h> int * calculate_mx4(int * x, int * y, int * z, int a, int b, int c, const int size) { int * res = (int *)calloc(size, sizeof(int)); #pragma loop count(4) for(int i = 0; i < size; i++) { res[i] = a * x[i]...
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    So, internal architecture look like this: 6 ALUs, Predicate Unit, 256 Registers File (80 bit [v1 .. v4] or 128 bit [v5+] + tags) Diagram is not completed yet (here is missing SRU block in Control Unit). Yellow: address data Brown: data Green: predicate data
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    8C: 1200-1300 MHz, DDR3-1600 ECC; 8CB (also known as SV): 1500 MHz, DDR4-2400 ECC; 16C: 2000 MHz, DDR4-3200 ECC. "C" means cores, "B" means "vector extensions". Memory is only ECC because it requires 4 bit to store tags, last 4 of 8 bits are used for ECC.
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Here is MP MFLOPS benchmark results by Roy Longbottom, I've disabled cpuid for compilation (because of other architecture) Benchmark can be found here: http://www.roylongbottom.org.uk/GigaFLOPS%20Benchmarks.htm My results here: https://github.com/EntityFX/anybench/tree/master/results...
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Description Cores Frequency (MHz) Prod year TDP Process (nm) GFlops (double) ISA generation Model name Alternative name Cpu Elbrus 1 300 2005 6 130 2.4 (E2Kv1) - e3m SoC Elbrus 1 300 2007 6 130 2.4 (E2Kv2) - e3s SoC Elbrus-S 1 500 2010 13 90 4 elbrus-v2 elbrus-s Экскурсовод, Эльбрус-3S...
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    Info MCST Elbrus cpu's benchmarks & e2k assembly code

    Hi! I did some benchmarks of Elbrus (E2K) cpu's. Here is compare result (Dhrystone, Whetstone, Linpack 100, Coremark, Scimark 2, MP MFlops):
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