I was under the impression that the majority of the gaming issues with the Qualcomm chips were due to the CPU, not the GPU side of things. I can't find any good sources saying one way or another. Though just looking at the list of games, there are a lot that can specifically be nailed down to an...
The two biggest issues with X Elite game compatibility are anti-cheat kernal modules, and usage of newer instructions which legally can't be emulated. An Nvidia iGPU won't help with either of those.
The way I see it, if Joe Shmo walks into Best buy and buys a Mediatek laptop because it has an...
I don't think so. From a technical comparison maybe, not from a buyers perspective imo.
The biggest benefit of using Nvidia graphics will be putting the brand name in advertising, but it's yet to be seen if Mediatek will be allowed to use "Nvidia". It could hurt the brand if the arm chips can't...
It's not that any tasks will be "out of reach" for a 8840hs. Lunar Lake will have a double digit lead in single threaded benchmarks vs phoenix / hawk point. And most client workloads are lightly threaded.
Ehh, I think that depends heavily on the who's buying it. Lunar Lake with 16GB will be as fast or faster for the types of stuff that most users do, while offering much better battery life.
The low operating margin isn't a good explanation for why AMD is a bad partner, IMHO. Their gross margin (which doesn't include overhead) is close to 50%. AMD could substantially increase their operating margin if they sold more chips.
It seems a bit misleading to use multi core benchmarks to compare "efficiency" between laptop chips. It makes the 12 core X Elite SKUs look more "efficient" compared to the lower end SKUs. In reality, 95% of the workloads these chips will be subjected to won't use 8+ cores. Comparing power...
Long time coming. I should go back through and reread their deep dive articles while they're still available. Or maybe I'll try and make an offline copy.
They didn't. I'm not sure I see your point. I'm saying that the 40% ipc claim (by leakers) is not comparable to the 50% ppw claim (by AMD). One was never going to happen, the other was plausible.
That claim wasn't nearly as unbelievable as the Zen5 40% ipc claim was.
RDNA1 increased ppw by around 25% over Radeon VII. RDNA2 by around 25-50% over RDNA1 (depending on sku). And unlike RDNA3, those two generations didn't have the benefit of a new node.
With Zen5, AMD went from one 4 wide decoder to two 4 wide decoders. They also widened most other parts of the core. On paper it's the biggest change since Zen1. Unfortunately, the real world gains do not live up to the hype, and in some workloads are practically non-existant. No one knows why...
For gaming, definitely. For office/productivity, I'm not so sure. For battery life, I would imagine that two CCXs is better.
Seeing as strix point is a high end chip that is primarily in gaming laptops, 8 full Zen5 cores would be a better fit overall.
That's not how that works. Windows provides an API. Drivers can only implement functionality that the API allows.
https://learn.microsoft.com/en-us/windows-hardware/drivers/ddi/
Can they? I'm not super familiar with Chipset drivers, but that sounds pretty far fetched. I don't think the chipset drivers "know" when a new program is run. Even if they do, that would add a delay each time a program is started. Not to mention the whole translation aspect.
How would the chipset driver know if a specific program is the old x86-64 or the new fixed length ISA? At some level, the OS would have to involved. And while I don't know the terms of their cross-licensing agreement, I doubt if it allows them to create x86 emulators.
I think you're misunderstanding what a micro op cache is. Whether an instruction is variable length or fixed length makes no difference once it's translated to micro ops. Every x86 CPU since the original 8086 has used micro ops.
If they're "translating" variable length instructions to fixed...
No discussion about Intel's microcode update and associated statement yet? My takeaways
The patch requires a bios update.
The microcode limits the voltage to 1.55V. As far as I can tell, this is the only change.
Intel says the cause of the degradation is voltage.
No performance loss except in...
There's just no market for them right now. Gamers should get the 7800X3D or wait for the 9800X3D. Those who need high core counts should either get the 7950X or 9950X.
It's really just semantics. Every CPU carries over some design elements from previous generation. Even Zen used elements Carizzo, but I will say that Zen5 seems to be the biggest change to Zen yet...
I was curious about this, so I checked TPU's numbers. Comparing peak clock speeds. The 7800X3D lost 500MHz vs the 7700X. The 5800X3D only lost 300MHz vs the 5800X.
Yeah, Meteor Lake has a low power island, and it does better in video playback than in other battery benchmarks, compared to Phoenix and Raptor Lake mobile.
Assuming you got that number from this video, the number they quote is 150-200mW, which is a 10-15% difference in package power.
I think Lunar Lake might match the X Elite in some workloads. I don't think it'll beat it all around.
Intel's QuickSync engine combined with the low power island and better manufacturing nodes should give lunar lake excellent battery life in video playback. I think this is where Lunar Lake will...
He said 2 chiplet embargo lifts on the 14th. I think he meant the 9900X and 9950X, which are technically 3 chipelts, but only 2 compute chiplets. It wouldn't make any sense for a product embargo to lift several days after the product is on the shelves.
A user on this forum, go back a page.
According to pudget, their AMD chips also have a higher failure rate than 13th gen and 14th gen Intel.
Maybe not all workloads cause degradation as quickly? The Minecraft servers (I think Wendell mentioned them) we're almost all failing within 6 months.
No, I don't think that's the best way to handle this. The performance of Zen5 vs raptor lake is still relevant even if no one should buy Raptor Lake. Leaving Raptor Lake off the charts just serves to stir up drama.
There are buyers who are looking to switch from raptor lake. There are people...
No, but adding pipeline stages allows designers to increase clockspeed.
In an CPU with no pipelining, the core has to decode and execute the whole instruction in a single cycle. It takes a long time for the chip to do all that work.
Pipelining is splitting the work into multiple stages. By...
Yeah, I actually like the new Intel. They've made some great moves.
Separating their foundry from their CPU design is better for both imo
Focusing more on core business
Adding a competitive GPU architecture as part of their core business
Adding e-cores with great PPA
Taking more risks in...
I see people claiming this a lot, but I have yet to see any good arguments for Apple cores reaching higher frequencies. Looking at other chips, the X elite caps out at 4.2GHz, and the Cortex-X4 is even lower. It seems to me that the design of these cores (with their mobile roots) has a lower...
How small does it have to be to be acceptable? If it's too small then the NPU wouldn't be useful for anything, then it would really be a waste. I understand being skeptical of Microsoft's 40TOP mandate, but 10% of the die area is not that bad.
NPUs currently have a chicken and the egg problem...
Nice, could you add the source?
Edit: nevermind, I'm dumb
Edit, if I'm interpreting this right, the NPU doesn't take up that much die area. About as much as 4 Zen5c or 8 RDNA 3.5 CUs.
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