Question 5 Nodes in 4 years discussion

[Hulk]

I thought it would be interesting to open a thread dedicated to Intel's "5 nodes in 4 years" initiative.
Some thoughts as follows.

Why put this out there? Why not just do it and then brag about the accomplishment? I assume they are trying to gain attention and perhaps put some pressure on themselves?

If Intel 7 is one of those nodes then I assume the "Start Date" for the 4 year countdown would be the release of Intel 7 with Raptor Lake's release, which would be October 20, 2022. The window for the achievement would close October 20, 2026. We're already a year in and only Intel 7 is retail. It's also a bit of gaslighting to include Intel 7 in this timeline because Intel 7 as we all know has a storied history comprised of "10's" and "plusses" going back farther than 4 years. Anyway let's "give" them Intel 7 as a new node with a release date of October 20, 2022.

What will the nodes be? I assume Intel 7, Intel 4, Intel 3, 20A, and 18A.

Is it possible the chiplet/tile strategy will be helping achieve this lofty goal? I think yes. If say, 80% of a processor can be carried forward then you have cut down on the requirement for the new node/silicon by a factor of 5. Intel could keep all tiles except the CPU on older/proven nodes and only move the CPU tile to the latest nodes, moving through Intel 4, 3, 20A, and 18A while only having to produce tiny dies, which allow higher yields, and since more of them fit on a wafer they don't need as many wafers. Other production facilities can keep manufacturing the larger higher yielding nodes while the cutting edge fabs only need to worry about the relatively small CPU tiles.

It seems like a good strategy and I thought that since the countdown has begun we should track their progress with this thread.

 

[Markfw]

I think its the usual marketing line. Try to make them look good after a serious failure.

 

[jpiniero]

I thought it would be interesting to open a thread dedicated to Intel's "5 nodes in 4 years" initiative.
Some thoughts as follows.

Why put this out there? Why not just do it and then brag about the accomplishment? I assume they are trying to gain attention and perhaps put some pressure on themselves?

Wall Street.

Intel could keep all tiles except the CPU on older/proven nodes and only move the CPU tile to the latest nodes, moving through Intel 4, 3, 20A, and 18A while only having to produce tiny dies, which allow higher yields, and since more of them fit on a wafer they don't need as many wafers. Other production facilities can keep manufacturing the larger higher yielding nodes while the cutting edge fabs only need to worry about the relatively small CPU tiles.

Except they aren't doing that. They are fabbing everything else at TSMC instead. (I believe the destkop version of Arrow Lake SoC tile might be fabbed on a 10 nm variant)

 

[eek2121]

*giggles* 🍿🥤

 

[eek2121]

Wall Street.



Except they aren't doing that. They are fabbing everything else at TSMC instead. (I believe the destkop version of Arrow Lake SoC tile might be fabbed on a 10 nm variant)

Oh I absolutely was not going to respond in this thread, but i have to…Intel has no plans for desktop compute (“cpu”) chips (or mobile) to be manufactured at anything other than an Intel fab.

 

[Hulk]

Wall Street.



Except they aren't doing that. They are fabbing everything else at TSMC instead. (I believe the destkop version of Arrow Lake SoC tile might be fabbed on a 10 nm variant)

They must have an economic reason for this, meaning that Intel fabs that won't be manufacturing their latest node CPU tiles will be manufacturing other silicon and it's more profitable this way rather than not using TMSC.

 

[H433x0n]

This is one of those threads that will be hilarious to look back at in 18-24 months. The first 5-10 pages will be a goldmine.

Edit: To add some content to the front page. This is the current state of TSMC N3.





So far the performance results measured from the A17 on N3B gained 14% more performance in exchange for 35% more power in Specint, while gaining 9% performance for 22% more power in Specfp.

Per TSMC, N3E (the version most people will be using) has 3-8% more performance than N3B. There’s almost no scaling difference between N4P and N3E sans DTCO.

Gate:
N4P - 49nm
N3E - 48nm
N3B - 45nm

Fin:
N4P - 28nm
N3E - 26nm
N3B - 26nm

MMP:
N4P - 28nm
N3E - 26nm
N3B - 23nm

This is the bar that Intel 18A has to clear. If 18A manages to get >10% better performance than N4P they’ll have process leadership next year. I personally think they’ll manage to do that with the Intel 3 node but I guess we’ll have to see how it turns out when SRF & GNR releases.

 

[Hulk]

This is one of those threads that will be hilarious to look back at in 18-24 months. The first 5-10 pages will be a goldmine.

Actually I agree. I see no way Intel can put all of those nodes on shelves in 3 years. That's why I put this thread up there. I want to either call Intel on the BS or congratulate them when times runs out.

 

[H433x0n]

Actually I agree. I see now way Intel can put all of those nodes on shelves in 3 years. That's why I put this thread up there. I want to either call Intel on the BS or congratulate them when times runs out.

I’m firmly in the opposite camp. After seeing TSMC N3 I’m pretty sure they’re going to get process leadership.

 

[Hulk]

I’m firmly in the opposite camp. After seeing TSMC N3 I’m pretty sure they’re going to get process leadership.

AFAIK Intel 3 is meant only for Sapphire and Granite Rapids. Do you have any thoughts as to why they are seemingly skipping that node for client?

 

[eek2121]

AFAIK Intel 3 is meant only for Sapphire and Granite Rapids. Do you have any thoughts as to why they are seemingly skipping that node for client?

We don’t know that they are. Future SoC or GPU chips might get manufactured there, otherwise, IFS.

I also would not count out a Meteor Lake refresh on Intel 3 in the future. Something to fill in the mid-low end.

 

[jpiniero]

We don’t know that they are. Future SoC or GPU chips might get manufactured there, otherwise, IFS.

I also would not count out a Meteor Lake refresh on Intel 3 in the future. Something to fill in the mid-low end.

I'm assuming that is still cancelled and all you will see is Arrow Lake at TSMC.

 

[turtile]

Why put this out there? Why not just do it and then brag about the accomplishment? I assume they are trying to gain attention and perhaps put some pressure on themselves?

If Intel 7 is one of those nodes then I assume the "Start Date" for the 4 year countdown would be the release of Intel 7 with Raptor Lake's release, which would be October 20, 2022. The window for the achievement would close October 20, 2026. We're already a year in and only Intel 7 is retail. It's also a bit of gaslighting to include Intel 7 in this timeline because Intel 7 as we all know has a storied history comprised of "10's" and "plusses" going back farther than 4 years. Anyway let's "give" them Intel 7 as a new node with a release date of October 20, 2022.

What will the nodes be? I assume Intel 7, Intel 4, Intel 3, 20A, and 18A.

Is it possible the chiplet/tile strategy will be helping achieve this lofty goal? I think yes. If say, 80% of a processor can be carried forward then you have cut down on the requirement for the new node/silicon by a factor of 5. Intel could keep all tiles except the CPU on older/proven nodes and only move the CPU tile to the latest nodes, moving through Intel 4, 3, 20A, and 18A while only having to produce tiny dies, which allow higher yields, and since more of them fit on a wafer they don't need as many wafers. Other production facilities can keep manufacturing the larger higher yielding nodes while the cutting edge fabs only need to worry about the relatively small CPU tiles.

It seems like a good strategy and I thought that since the countdown has begun we should track their progress with this thread.

It's just for investors and the government to show they can be profitable and worth government subsidies.

Based on their projections, Intel won't be ahead until 18A. Obviously, the high NA machines will facilitate this. The real question is whether or not Intel can hit the same yields and production numbers as TSMC. TSMC usually starts out with a massive order of Apple chips so its yields need to be pretty high. Of course, they are smaller chips so the process doesn't need to be super mature to be successful.

Intel, on the other hand, can afford lower yields because they fab for themselves. So even if it would not be profitable for Apple to contract Intel, it might be for Intel. As you mentioned, they can make tiny chips for their packaging tech. The thing is, TSMC Finflex seems a much more affordable and higher-yielding solution. Intel is going to lose yield after packaging and add more time to market because of the complexity and steps.

 

[moinmoin]

Intel, on the other hand, can afford lower yields because they fab for themselves.

Will be interesting to see how long that stays true. IFS needs nodes to be competitive, and yield is a significant part of that. Intel needs IFS to be successful to cover a significant part of the fab investment costs, something it won't manage with uncompetitive and/or costly nodes. And low yield makes nodes costly.

 

[turtile]

Will be interesting to see how long that stays true. IFS needs nodes to be competitive, and yield is a significant part of that. Intel needs IFS to be successful to cover a significant part of the fab investment costs, something it won't manage with uncompetitive and/or costly nodes. And low yield makes nodes costly.

My guess is that most customers are going to wait until the node matures. It seems way too risky. Many TSMC customers wait for maturity and they have been reliable.

 

[coercitiv]

Oh I absolutely was not going to respond in this thread, but i have to…

For science and giggles, don't respond. Let it play out, enjoy the show. I certainly plan to.

 

[Hulk]

Intel is going to lose yield after packaging and add more time to market because of the complexity and steps.

Perhaps Intel would rather accept the known added cost of complex packaging rather than the unknowns involved with EUV yields with large dies?

 

[Mopetar]

Node names have always been a little bit of fluff, but frankly their claim is just pure marketing. They definitely don't mean full nodes.

Of course companies were already making up numbers, so why not make up more of them. TSMC has all manner of slightly different node names, some with slightly better density or other characteristics so why shouldn't Intel be able to play the same game?

Whether they can pull it off or not is a meaningless question because there's no clearly define criteria. If they want to declare something as a 19A node that exists between their announced 20A and 18A nodes, then who are we to stop them.

Frankly I don't care what they call it as long as it performs well. If I were an investor I'd feel like both companies are just throwing out a lot of different information to deflect from issues or as an excuse for why projections were missed or are being revised, but I'm not, so I just care about whether the performance is good. If they want to make a minor tweak and call it a new node then they're welcome to, but just don't expect me to marvel over the non-accomplishment.

 

[H433x0n]

It's just for investors and the government to show they can be profitable and worth government subsidies.

Based on their projections, Intel won't be ahead until 18A. Obviously, the high NA machines will facilitate this. The real question is whether or not Intel can hit the same yields and production numbers as TSMC.

High NA is not being used for 18A. I don’t think they’ll need 18A to take the lead either. TSMC N3B / N3E only brings ~10% more performance than N4P.

Intel is going to lose yield after packaging and add more time to market because of the complexity and steps.

Advanced packaging (Foveros) has a 1% fail rate per the Intel innovation event. I’d be willing to bet COWOS has a similarly low failure rate too. You’re more likely to get a better yield with advanced packaging and smaller dies than larger dies without advanced packaging.

 

[Hulk]

Node names have always been a little bit of fluff, but frankly their claim is just pure marketing. They definitely don't mean full nodes.

Of course companies were already making up numbers, so why not make up more of them. TSMC has all manner of slightly different node names, some with slightly better density or other characteristics so why shouldn't Intel be able to play the same game?

Whether they can pull it off or not is a meaningless question because there's no clearly define criteria. If they want to declare something as a 19A node that exists between their announced 20A and 18A nodes, then who are we to stop them.

Frankly I don't care what they call it as long as it performs well. If I were an investor I'd feel like both companies are just throwing out a lot of different information to deflect from issues or as an excuse for why projections were missed or are being revised, but I'm not, so I just care about whether the performance is good. If they want to make a minor tweak and call it a new node then they're welcome to, but just don't expect me to marvel over the non-accomplishment.

If you only care about how it performs why read/post in tech forums? I'm being serious. Of course the "endgame" is performance but I'm an enthusiast. I enjoy not only the destination but the journey as well and that's why I'm here reading and posting about microprocessor technology.

5 nodes in 4 years is Intel throwing down the gauntlet. They aren't going to ramp up billion dollar fabs to manufacture a node to say they held to their claim. That's ridiculous. They told us Intel 7, 4, 3, 20A, 18A. Let's see if they can do it.

 

[Saylick]

Intel has a shot at taking process leadership, but how that plays out in terms of overall volume vs. TSMC and whether or not they can win customers away from TSMC via IFS is a different story.

Intel has to be more aggressive with their process schedule if they want to stand a chance but TSMC will execute on a regular basis regardless of what Intel does, and I don't see any reason why TSMC cannot accomplish anything Intel potentially accomplishes with its bet on GAA and backside power delivery. It will only be a matter of time.

 

[dullard]

If Intel 7 is one of those nodes then I assume the "Start Date" for the 4 year countdown would be the release of Intel 7 with Raptor Lake's release, which would be October 20, 2022. The window for the achievement would close October 20, 2026.

You are being too generous. Intel started talking about 5 nodes in 4 years in July 2021. Thus, I think to measure their success they must meet it by July 2025. https://www.anandtech.com/print/168...nm-3nm-20a-18a-packaging-foundry-emib-foveros

That said, with 18A silicon going to the fab in Q1 2024, and plans to be manufacturing ready by H2 2024, Intel would have to really screw up to not meet that July 2025 deadline for at least some chips in some customer's hands. (It is possible that Intel's fab customers might get products before Intel releases 18A consumer CPUs). If ASML's high-NA is delivered on time, then it is possible to even have Intel-Next in production in late 2025--almost making 6 nodes in 4 years.

If you only care about how it performs why read/post in tech forums? I'm being serious.

That isn't what he said. He doesn't care about node names. That doesn't mean he only cares about performance. In reality, Intel 3 is just a slightly revised Intel 4. And Intel 18A is just a slightly revised Intel 20A. Intel is doing a lot in 4 years. But, Intel could just have as easily claimed 5 half-nodes in 4 years. At least that would be a better match of what we think of as nodes. For example, under the original Intel node names, Intel 4 = 7 nm, Intel 3 = 7+, Intel 20A = 5nm, Intel 18A = 5+.

 

[Thunder 57]

I’m firmly in the opposite camp. After seeing TSMC N3 I’m pretty sure they’re going to get process leadership.

The question isn't whther they will regain leadership. That seems very possible. The question is will they achieve 5 modes in 4 years. On that one, I am far less optimistic.

 

[Thunder 57]

You are being too generous. Intel started talking about 5 nodes in 4 years in July 2021. Thus, I think to measure their success they must meet it by July 2025. https://www.anandtech.com/print/168...nm-3nm-20a-18a-packaging-foundry-emib-foveros

That said, with 18A silicon going to the fab in Q1 2024, and plans to be manufacturing ready by H2 2024, Intel would have to really screw up to not meet that July 2025 deadline for at least some chips in some customer's hands. (It is possible that Intel's fab customers might get products before Intel releases 18A consumer CPUs). If ASML's high-NA is delivered on time, then it is possible to even have Intel-Next in production in late 2025--almost making 6 nodes in 4 years.


That isn't what he said. He doesn't care about node names. That doesn't mean he only cares about performance. In reality, Intel 3 is just a slightly revised Intel 4. And Intel 18A is just a slightly revised Intel 20A. Intel is doing a lot in 4 years. But, Intel could just have as easily claimed 5 half-nodes in 4 years. At least that would be a better match of what we think of as nodes. For example, under the original Intel node names, Intel 4 = 7 nm, Intel 3 = 7+, Intel 20A = 5nm, Intel 18A = 5+.

But here we go with marketing names again. Originally 18A had high-NA, now we know it will not. So is it still 18A, or more of a 20A+? Since Intel is seemingly pulling 18A in because high-NA isn't ready do we credit them for being on time, or do we blame Intel by saying 18A isn't what was originally promised?

 

[lightisgood]

Originally 18A had high-NA, now we know it will not.

Intel didn't say 18A is the process fully adopting high-NA.
They said that "We are world first receiver of high-NA".

To begin with, commercial high-NA EUV model should be shipped late 2024.
Clearly, 18A is high-NA test bed, not high-NA process.