Info 64MB V-Cache on 5XXX Zen3 Average +15% in Games

[Kedas]

Well we know now how they will bridge the long wait to Zen4 on AM5 Q4 2022.
Production start for V-cache is end this year so too early for Zen4 so this is certainly coming to AM4.
+15% Lisa said is "like an entire architectural generation"

 

[Timorous]

So I have been thinking about how AMD might respond to ADL.

Until now I have assumed that not much will really change. Current 5 series parts might see a price drop and v-cache parts will come in at current MSRPs give or take depending on exact performance in gaming and productivity. However, there is an opportunity for AMD to reshuffle the stack with a move to 6000 series parts.

Something like this might be possible.
6500 - 6c12t Zen 3, no v-cache. - maybe they won't bother with this and just cut the pricing for the 5600X in the DIY channel. I expect OEMs will want 6k series parts though so even if they don't bother with DIY it might come out as OEM only.
6600X - 8c16t Zen 3 with v-cache.
6800X - 12c24t Zen 3 with v-cache.
6950X - 16c32t Zen 3 with v-cache.

If there is enough performance then AMD might do that and bump the price for each tier but also lower the cost/core. 6600X becomes a $350 tier part, 6800X a $500 tier part and 6950X would probably retain its current price point.

Of course if AMD are supply limited they won't do that at all but if they have enough supply, and want to keep good mind share in light of ADLs price/performance (if you ignore platform costs which will be coming down pretty quickly with lower cost DDR5 and B660) then that would be a way to put the squeeze on Intel in the DIY space.

 

[LightningZ71]

Given the current market, AMD has to do next to nothing to keep up the sales that they have, which is essentially all they can make. AMD is currently supply constrained. They are selling out everything that makes it out of the factory. Even with a competitive Intel product in the market, without doing anything, they will still move every part they make at RRP. If they want to keep their average transaction price at the retail counter similar to what they have been getting for the last year, they can choose to make the 6800x, 6900x and 6950x with vcache and offer them at their current prices, maybe with another $20 tacked on because they can. I expect the Zen3 + vcache combo to gain enough performance in many of the areas that it lost out in during the most recent benchmarks to bring them to at least parity overall, if not manage a tiny overall lead in most areas.

The true battle between AMD and Intel will be in the 12400, 12600K, 5600x, 5800x territory. The 12600K, from the reviews we've seen, is every bit the match of the 5800x across the board, for less money, and without the exotic cooling requirements of the higher specced Alder Lake processors. The 12400 should be able to match or beat the 5600x across the board as well, for likely less money up front. Where AMD has value against the 12400/12600K isn't in the X series processors, it's in the 5700G. The 5700g will likely offer better overall CPU performance than the 12400 in MT scenarios, and has a much better integrated GPU.

 

[jpiniero]

The vcache models are definitely going to be more than $20 extra. Who knows what TSMC is charging for 7 nm wafers now and they are effectively doubling the 7 nm silicon needed for vcache models and that's on top of what the bonding costs. Hence the talk of it only being 12 and 16 core only. An 8 could still happen but it'd be more than the 5700X.

Prioritizing the chiplet supply for Milan/Milan-X/Threadripper Pro/Zen 3D seems a better idea than cutting Zen 3 prices.

 

[coercitiv]

Prioritizing the chiplet supply for Milan/Milan-X/Threadripper Pro/Zen 3D seems a better idea than cutting Zen 3 prices.

Zen3 just got a price cut at Microcenter.

 

[Rigg]

Zen3 just got a price cut at Microcenter.

$300 for 5800x. Probably just a temporary sale but still that's pretty crazy. #Tempted

 

[Makaveli]

View attachment 52407

$300 for 5800x. Probably just a temporary sale but still that's pretty crazy. #Tempted

Great prices and perfect for those on AM4 with Pre Zen 3 cpu's. This Christmas season will be a great time for in socket upgrades on AMD.

And for those on Zen+ good time to pickup a used Zen 2 or go Zen 3.

 

[jpiniero]

Zen3 just got a price cut at Microcenter.

That's Microcenter's doing, not AMD. They've done temporary loss leaders like this to get you in the store. A month ago they sold a 9700K for $150.

 

[Timorous]

The vcache models are definitely going to be more than $20 extra. Who knows what TSMC is charging for 7 nm wafers now and they are effectively doubling the 7 nm silicon needed for vcache models and that's on top of what the bonding costs. Hence the talk of it only being 12 and 16 core only. An 8 could still happen but it'd be more than the 5700X.

Prioritizing the chiplet supply for Milan/Milan-X/Threadripper Pro/Zen 3D seems a better idea than cutting Zen 3 prices.

V-cache uses less 7nm silicon than cezanne for an 8 core CCD and since it is split into two discrete parts the yields are higher. There is an additional packaging step with v-cache parts but I don't see it costing more than the extra silicon costs of cezanne. The issue will be capacity in bonding the dies for the v-cache chiplets.

 

[Hitman928]

The vcache models are definitely going to be more than $20 extra. Who knows what TSMC is charging for 7 nm wafers now and they are effectively doubling the 7 nm silicon needed for vcache models and that's on top of what the bonding costs. Hence the talk of it only being 12 and 16 core only. An 8 could still happen but it'd be more than the 5700X.

Prioritizing the chiplet supply for Milan/Milan-X/Threadripper Pro/Zen 3D seems a better idea than cutting Zen 3 prices.

They are not doubling 7 nm silicon needs, they are only doubling the L3 area of the silicon. On either side of the V-cache is different substrate that doesn't need mask layers and is optimized for thermal transfer.

 

[DrMrLordX]

One thing to keep in mind

Zen3D lets AMD delay Zen4 on high-end desktop interminably until they have enough "failed"/high leakage CCDs from Genoa production to roll out Raphael cost-effectively. Assuming Raphael even follows the Zen2/Zen3 model which is still not certain! Regardless, AMD may save a lot of time/trouble/sweat and make a ton of extra money by provisioning the majority of their N5 wafers for Genoa and CDNA2/Mi200. Zen3D can be sold as a loss leader just to maintain (or grow) desktop market share.

It really doesn't matter if margins on Zen3D are poor when they make more money off their N5 allocation as result.

Only area where Zen3D won't help AMD is everything below their 12c desktop offerings. Vermeer B2-stepping refresh is not going to be very competitive with 12600k, 12400 etc. If AMD wanted expansion at that price range, they're going to have to do something else, like try to bring Rembrandt to those users. If that would even help!

 

[leoneazzurro]

One thing to keep in mind

Zen3D lets AMD delay Zen4 on high-end desktop interminably until they have enough "failed"/high leakage CCDs from Genoa production to roll out Raphael cost-effectively. Assuming Raphael even follows the Zen2/Zen3 model which is still not certain! Regardless, AMD may save a lot of time/trouble/sweat and make a ton of extra money by provisioning the majority of their N5 wafers for Genoa and CDNA2/Mi200. Zen3D can be sold as a loss leader just to maintain (or grow) desktop market share.

It really doesn't matter if margins on Zen3D are poor when they make more money off their N5 allocation as result.

Only area where Zen3D won't help AMD is everything below their 12c desktop offerings. Vermeer B2-stepping refresh is not going to be very competitive with 12600k, 12400 etc. If AMD wanted expansion at that price range, they're going to have to do something else, like try to bring Rembrandt to those users. If that would even help!

MI200 is on 7N, MI300 probably will use 5N

 

[DrMrLordX]

MI200 is on 7N, MI300 probably will use 5N

Really? I had heard it would be hybrid N7 and N5. If Mi200 is N7-only, that saves more N5 wafers for Genoa.

 

[Hitman928]

Really? I had heard it would be hybrid N7 and N5. If Mi200 is N7-only, that saves more N5 wafers for Genoa.

I don't think AMD has confirmed what process MI200 uses, they've just said an advanced node. I've seen speculation/rumors of 5nm, 6nm, and 7nm. Since MI200 is already being installed into Frontier, 6nm or 7nm seems most likely, but given the low volume needed, maybe they use this as their pipe cleaner?

 

[maddie]

They are not doubling 7 nm silicon needs, they are only doubling the L3 area of the silicon. On either side of the V-cache is different substrate that doesn't need mask layers and is optimized for thermal transfer.

Beat me to it. That thermal silicon might even be from rejected silicon ingots. No doping needed.

 

[leoneazzurro]

Really? I had heard it would be hybrid N7 and N5. If Mi200 is N7-only, that saves more N5 wafers for Genoa.

Well, we'll see what really is next Moday, but all rumors pointed to it being on N7. The one going for N5+N6 is RDNA3.

 

[jpiniero]

V-cache uses less 7nm silicon than cezanne for an 8 core CCD and since it is split into two discrete parts the yields are higher. There is an additional packaging step with v-cache parts but I don't see it costing more than the extra silicon costs of cezanne. The issue will be capacity in bonding the dies for the v-cache chiplets.

You also have the IOD, which the wafer is cheap but it's still not free.

 

[Timorous]

You also have the IOD, which the wafer is cheap but it's still not free.

But that is the same regardless of v-cache. I really don't see an 8c v-cache part being more expensive to manufacture than a cezanne part.

The biggest hurdle is 1) how much do AMD even want to compete with ADL in the DIY space and 2) what is their capacity for bonding.

If AMD want to compete and they have enough capacity they can easily sell 8c v-cache parts to fill the gap between the 12600K and 12700K.

 

[blckgrffn]

Isn’t it nice that AMD has options ready and loaded for production months ago? This feels so much different than the “oh, we’re f’d” AMD from what, 10 years ago now?

Also, I needed to buy more AMD stock even at $83 or whatever. I spent $1k in my 401k brokerage because that was what I was willing to maximum spend on a GPU that I couldn’t buy at the time. Small beans compared to others here but I think they have every reason to feel bullish so long as they can get silicon.

 

[LightningZ71]

Do we think that AMD would attempt die recovery on the Cache dies? For example, use the full 64MB L3 dies for the 8C parts, and if they have a non-trivial amount of Cache dies that have a bad cell or two, produce 32 or 48MB L3 dies for bonding to the 6 core CCDs?

 

[Hitman928]

Do we think that AMD would attempt die recovery on the Cache dies? For example, use the full 64MB L3 dies for the 8C parts, and if they have a non-trivial amount of Cache dies that have a bad cell or two, produce 32 or 48MB L3 dies for bonding to the 6 core CCDs?

The cache area is relatively quite small on a mature process. Additionally, cache is the type of thing that is easy to build some redundancy into. For these reasons, there really shouldn't be any die harvesting need/possibility from the V-cache. What is more likely is a failure in the die thinning / bonding process.

 

[Timorous]

Do we think that AMD would attempt die recovery on the Cache dies? For example, use the full 64MB L3 dies for the 8C parts, and if they have a non-trivial amount of Cache dies that have a bad cell or two, produce 32 or 48MB L3 dies for bonding to the 6 core CCDs?

Not sure about that but I do presume that some dies that fail the bonding process can be run as standard parts with 32 MB cache unless something goes catastrophically wrong in that process.

 

[DrMrLordX]

Do we think that AMD would attempt die recovery on the Cache dies? For example, use the full 64MB L3 dies for the 8C parts, and if they have a non-trivial amount of Cache dies that have a bad cell or two, produce 32 or 48MB L3 dies for bonding to the 6 core CCDs?

Probably not. Pretty sure AMD has said publicly that if they actually do release Zen3D that it will be 12c and 16c parts only. Would be nice if I'm wrong, but . . .

 

[jpiniero]

Probably not. Pretty sure AMD has said publicly that if they actually do release Zen3D that it will be 12c and 16c parts only. Would be nice if I'm wrong, but . . .

IIRC, AMD hasn't said anything to that effect.

 

[jpiniero]

But that is the same regardless of v-cache. I really don't see an 8c v-cache part being more expensive to manufacture than a cezanne part.

It'd be two 75-ish mm2 bonded plus the IOD versus 189 mm2 of 7 nm. The desktop Cezanne margins have to be non ideal too, they must only do it because the chips are so leaky that they would be so unusable in mobile. Epyc is likely binned a lot tighter in comparison.

 

[DrMrLordX]

IIRC, AMD hasn't said anything to that effect.

As I said, I'd like to be wrong! $299 5600X3D would be pretty nifty.