I suspect that, on a real cost basis, the Vcache is more than just the cost of the silicon. Remember that there is extra packaging costs associated with combining the two dies and bonding them, and I suspect that it's not a faultless process, further increasing cost per package to deal with loss. A hypothetical large cache 5900x would end up having an ASP that's very close to the 5950x, and the 5950x would have an ASP that's several hundred dollars above what it currently is. The knock on effect would carry to Threadripper, lifting it's prices as well.
On a related note, I'm looking forward to seeing Saphire Rapids benchmarked against VCache equipped EPYC processors.
I think the new Vcache and other progress on the high end is interesting and will have benefits to the high end. At the same time it's extremely disconcerting what's happening to the value market lineup. At some point old 3xxx series (3600, 3600X, 3700) will flush through the market, and I see nothing on the horizon that will replace them. 3100 and 3300 are essentially nonexistent. Not everyone can afford $300 (or $260+ for the crippled 5700G) for a CPU alone. Hell for that matter, not all that many people even need something like that, a majority of ordinary PC users for typical home and office use would be extremely well served by a Ryzen 3 3100, or hypothetical 4C Zen3 SKU.
How do you arrive at 1/3rd of 5400G's die size just for 4 cores that you want to remove?The sad part is that AMD could have produced a "half Renoir/cezanne" with 4 cores and 8 CUs of Vega iGPU that would have been roughly 2/3rds the size that the 5400g die is now.
There are 4C Zen 3 SKUs for desktop - the 5300G and 5300GE. They are just not making it available to DIY.
Yeah they aren't going to cut out PC. They understand that comercial sales. Specifically retail CPU and Laptops sales kept them going and completely removing themselves for that fall back would be terribly shortsighted. But I have stated before that I am pretty sure for every release they target a certain core value based on perf/$ comparisons to Intel's offerings. Intel and Nvidia tend to completely replace their lineups because in a position of superiority they feel they don't need to compete in pricing and that lowering the cost of the product at any point lowers the perception of their products. AMD doesn't do this, when TR3 came out they specifically said that TR3 was about adding onto their portfolio and not replacing it and that anyone wanting less cores or lower price into many of the platforms benefits TR1/2 were still available. So at this point Zen 2 products are like the old saying there are no bad products only bad prices. As long as their lower end products are well priced for their performance they are still a competitor in the low cost space. The only issue with their lineup really is the fact that you have to go back to the 3400G for a decent APU. What is and has been their strong point.This is all true, but it begins to beg the question of if they want to be in the regular consumer CPU space if the trend continues.
Say they go to 5nm or 6nm with new TSMC contract, and project they can sell their entire allotment in the HPC/Server side of things with perhaps a handful of R9 $1500 CPUs. Should they simply stop making everything else because it's less profitable? In terms of stock value and profit, the answer would be yes.
It would I believe come at a cost in consumer perception of the brand though. They would virtually cease to exist outside of back-office/b2b.
I don't know if that is actually the case and if it is, its a good reason why they should cap that out at the 5600X. But for what you get in increased yields with a smaller die. You run into 3 issues. 1 reduced ASP per wafer. 2. Reduced availability of higher end dies. Before a certain amount of those dies were good for the in the case of the APU 5900HX, 5900HS, 5900H, 5800H, 5800HS, 5800U, 5600U, 5600H, 5600HS and so on. These are all CPU's that they get less of by using their allocation on another smaller die. If they have fantastic yields on wafers that produce these products using their allocation on something offering cheaper products seems wasteful in a finance way. 3. You still have defective dies, either less available cores, or less available GPU units. Chances of a die that isn't cut up (the edge dies) that doesn't fit the 5400U's requirements would be incredibly small. Meaning they can basically use every rectangular die that comes out of the wafer (within a certain level, there will still be some waste). Now you offer a smaller die but the defect rate stays the same, you would have even with fantastic yields, several chips that could be used. So now to maximize the use of the wafer they have to offer lower and lower priced products, maybe even offering CPU's that they were not interested in trying to sell in volume, like maybe getting away from 2c products.It has been stated over and over that their yields on N7 are excellent. At this point, they are already binning perfectly functional die down to lower levels for no other reason than contract obligations.
The point of a smaller die is the increased yields per wafer. Assuming that yields are constant, and that they are not packaging constrained, they will yield over 50% more usable dies from the same wafer while also relieving them from wasting functional six/eight core dies to meet their split obligations. This gives them a higher ASP on those wafers and more total volume per month.
Actually the way they describe the Vcache. It self bonds when they place the vache on the prepped die. So outside not putting the protective silicon on the die for the CCD, there really isn't a whole lot more to the packaging.I suspect that, on a real cost basis, the Vcache is more than just the cost of the silicon. Remember that there is extra packaging costs associated with combining the two dies and bonding them, and I suspect that it's not a faultless process, further increasing cost per package to deal with loss. A hypothetical large cache 5900x would end up having an ASP that's very close to the 5950x, and the 5950x would have an ASP that's several hundred dollars above what it currently is. The knock on effect would carry to Threadripper, lifting it's prices as well.
On a related note, I'm looking forward to seeing Saphire Rapids benchmarked against VCache equipped EPYC processors.
Yeah they aren't going to cut out PC. They understand that comercial sales. Specifically retail CPU and Laptops sales kept them going and completely removing themselves for that fall back would be terribly shortsighted. But I have stated before that I am pretty sure for every release they target a certain core value based on perf/$ comparisons to Intel's offerings. Intel and Nvidia tend to completely replace their lineups because in a position of superiority they feel they don't need to compete in pricing and that lowering the cost of the product at any point lowers the perception of their products. AMD doesn't do this, when TR3 came out they specifically said that TR3 was about adding onto their portfolio and not replacing it and that anyone wanting less cores or lower price into many of the platforms benefits TR1/2 were still available. So at this point Zen 2 products are like the old saying there are no bad products only bad prices. As long as their lower end products are well priced for their performance they are still a competitor in the low cost space. The only issue with their lineup really is the fact that you have to go back to the 3400G for a decent APU. What is and has been their strong point.
The overall amount doesn't change, but if you used it strategically to help dissipate heat from the hottest spots it would be a bigger help. Whether that's possible or even worth doing for any benefits conferred is another matter entirely though.
Actually the way they describe the Vcache. It self bonds when they place the vache on the prepped die. So outside not putting the protective silicon on the die for the CCD, there really isn't a whole lot more to the packaging.
Yeah but thats because they are selling everything. They have stuff in those slots, just not on shelves. That has more to do with demand and wafer allotment. Sure for someone buying a CPU under a 5600x/3600(x) there isn't a whole lot of value out there for AMD. But its because the stuff they do have in those markets are pushed up in demand. This sadly for them pushes them to buy Intel with something like the 11400 or 10100.I'm not sure if you've been following their DIY offerings, but they're basically MIA in a ton of areas.
3600 is spotty for stock and $239 @ Amazon. This represents the value segment at present for Zen2, although you can still find 1600 for $149, but that's a tough sell for such an old product.
3100/3300 are unavailable beyond unicorn moments
5300 is a thing, but no DIY apparently
3400G is the same price on Amazon as a 3600, so kind of pointless (I don't blame AMD for this, I'm sure it's just very old stock being scalped by third parties)
There is a 200GE, 2C/4T, but it's the same price as the brand new 11100F from Intel at around $110, which is a far superior 4C/8T with newer features.
AMD has the best product, but their current lineup is almost exclusively high end. Do you see signs they might flesh this out?
If they are the leading customer for this, surely TSMC determines the timeline?2022? AMD dragging their feet again.
It is expected, if Zen3+3D V-Cache will lounch in Q1 or Q2 2022.
2022? AMD dragging their feet again.
Yep, SoIC stacking for 5nm arrives 2Q or 3Q 2022. Can't be late to a party that haven't started yet.If they are the leading customer for this, surely TSMC determines the timeline?
It's not like anyone other than TSMC can package this, however much we might want this yesterday.
No rush, Intel Alder lake won’t move mountains anyway.
2022? AMD dragging their feet again.
I wonder if the possible 4 stack Epyc devices will still be at 2TB/s or even faster. I believe that they have claimed the latency is the same. The package power might be a bit higher; SRAM is still a lot of active transistors, so overall package power limitations may come into play. AMD has made their mobile chips with half the L3 of the desktop chips even though a better hit rate should reduce power usage by not needing to drive the external interfaces.It could be slower in terms of latency, so it might have slight differences on whether it's going to the V-stack or on the original one.
They said 2TB/s of bandwidth which is not lower than the bandwidth of the L3 caches in 5950X.
There is a trade-off there somewhere. Caches are very complex designs these days. I suspect that intel had the lead for so long mostly due to cache design in addition to the process tech lead over Global Foundries. It has been a long time since my computer architecture class; I don’t really remember the structure very well. The address interleave is presumably very fast since it just keys off some bits of the address. If that was part of the tag instead, then it would take longer in the comparators to determine if the line is present or not. That would presumably get unmanageable at large sizes anyway. From what I know about AMD’s cache design, I would expect that it is a trade off between interconnect and logic / access time. Managing more slices means a lot more interconnect while moving those bits into tag or other components would make it slower to access. Interconnect burns a lot of power and there is only a certain amount of interconnect you can have without requiring more metal layers. CPUs are already up to around a dozen metal layers, I think, so the limitation may just be routing interconnect really. Every layer you add adds to the mask set and to the number of processing steps. The cache die may have significantly lower number of metal layers compared to the cpu, so they should be a lot cheaper (lower number of mask, lower number of processing steps, quicker from start to finish, etc). This is one of the reasons I expect that the single layer stacked chips will actually be reasonably priced. It is only one cache chip wafer to 2 cpu wafers due to the size and the cache die wafer might be a lot cheaper.So what i dont understand is , if its only 1 stack for 64mb, has the same performance/latency as the existing L3, why is the existing L3 so big. I wonder if it will limit clocks at some point?
If they are the leading customer for this, surely TSMC determines the timeline?
No rush, Intel Alder lake won’t move mountains anyway.
At Computex 2021 their CEO clearly said they would be in production by the end of the year so why are you acting like a 2022 release date is a sudden shock? A wafer isn't going through production, packaging, and shipping in 2 weeks.
I think you need to look at the bigger picture, especially if this product is being released in lieu of something else.
Doesn't really matter, does it? Unless we're all happy with AMD dragging their feet due to no competition.
See above comment to KompuKare. Q2 2022 should be the latest time at which AMD would release Raphael(Zen4) according to their 15-18 month cadence.
While I do think there is a danger of AMD becoming complacent (the last time in 2005ish they wanted to make hay rather than invest in their fabs, and then Conroe happened), there might be logic with having both an AM4 and an AM5 release next year.Zen3D AM4 Q1 2022
Zen4 AM5 Q2 2022
What's the issue?