Question Alder Lake - Official Thread

[Hulk]

With the release of Alder Lake less than a week away and the "Lakes" thread having turned into a nightmare to navigate I thought it might be a good time to start a discussion thread solely for Alder Lake.

 

[Hitman928]

I have a few questions regarding this Voltage vs. Frequency plot. Please excuse my lack of knowledge here. Consider V=IR, how does this Frequency vs. Voltage plot compare to a Power vs. Frequency plot? At the end of the day it's the power we're concerned about, right?

If the E core requires 1.2V at 3.8GHz and the P requires 1.2V at ~4.7GHz, how does that relate to power usage? At the end of the day we need to know the current to know power right?

For digital circuits there are two powers, static power (when the signals aren't switching) and dynamic power (the time when the signals are changing). Typically, Pdyn >> Pstatic but that stopped being true for planar devices as you approached the 20 nm process. FD-SOI planar and FinFETs help get Pstatic back under control (though it's rising again as we progress). Anyway, just a short intro to say that this post will focus on Pdyn.

The estimated Pdyn = (1/2) * CL* (Number of gates switching) * Freq * Voltage^2

So, looking at this, you would expect that there is a linear relationship between frequency and power. However, as we know, you need additional voltage as well to increase freqency. there is also a temperature factor that is typically left out but as temperature rises, it effects the mobility of the FET channel causing the need to increase voltage further to maintain the same frequency. In the end, frequency and power have more of a quadratic (or maybe higher order) relationship I believe, though this is based more on experimental and form fitting data.

Obviously from an outside perspective, we can't get numbers on CL or # of gates switching, but we don't need those if we start from a known measured power level and are ok with making a few assumptions (e.g. constant temp, same load on the CPU, Pstatic is negligible). At that point, the CL and # of gates become a constant and can be removed from the equation. Then you just need to compare freq and voltage to your known measured power level and you can calculate how much power the CPU should consume at a different point on the V/f curve. It's not perfect but should give you at least a ball park estimate.

 

[Hulk]

For digital circuits there are two powers, static power (when the signals aren't switching) and dynamic power (the time when the signals are changing). Typically, Pdyn >> Pstatic but that stopped being true for planar devices as you approached the 20 nm process. FD-SOI planar and FinFETs help get Pstatic back under control (though it's rising again as we progress). Anyway, just a short intro to say that this post will focus on Pdyn.

The estimated Pdyn = (1/2) * CL* (Number of gates switching) * Freq * Voltage^2

So, looking at this, you would expect that there is a linear relationship between frequency and power. However, as we know, you need additional voltage as well to increase freqency. there is also a temperature factor that is typically left out but as temperature rises, it effects the mobility of the FET channel causing the need to increase voltage further to maintain the same frequency. In the end, frequency and power have more of a quadratic (or maybe higher order) relationship I believe, though this is based more on experimental and form fitting data.

Obviously from an outside perspective, we can't get numbers on CL or # of gates switching, but we don't need those if we start from a known measured power level and are ok with making a few assumptions (e.g. constant temp, same load on the CPU, Pstatic is negligible). At that point, the CL and # of gates become a constant and can be removed from the equation. Then you just need to compare freq and voltage to your known measured power level and you can calculate how much power the CPU should consume at a different point on the V/f curve. It's not perfect but should give you at least a ball park estimate.

Thank you for the detailed response. Do you have any insight on what happens to the impedance of the CPU as the frequency remains constant while the number of gates switching increases? I would assume it decreases, which would lead to higher power consumption?

 

[Hitman928]

Thank you for the detailed response. Do you have any insight on what happens to the impedance of the CPU as the frequency remains constant while the number of gates switching increases? I would assume it decreases, which would lead to higher power consumption?

That's not really how it works. I'm assuming you are still thinking in terms of P=IV and V=IR. Not that this equation is false, but you have to know where/how it is applied. In a simplified view, the power consumed by the CPU is the sum of the power consumed by a bunch of circuit branches. When a 'branch' is not switching it is off from a Pdyn perspective and thus drawing no current. When those branches switch (more gates switching) then those branches are on and drawing current and add to the overall sum of current (and power) being drawn. In terms of resistance, you could view it as the branches being infinite resistance when off (thus disregarded) and creating resistors in parallel when on. The voltage would always be constant. This is disregarding power management circuitry and assuming a clean digital signal (which assumptions I also made in my previous post). From a top level perspective you could say that the resistance looking into the CPU has decreased and thus current increased. It doesn't really explain what is really happening inside the CPU but it's also not inaccurate.

 

[Hulk]

That's not really how it works. I'm assuming you are still thinking in terms of P=IV and V=IR. Not that this equation is false, but you have to know where/how it is applied. In a simplified view, the power consumed by the CPU is the sum of the power consumed by a bunch of circuit branches. When a 'branch' is not switching it is off from a Pdyn perspective and thus drawing no current. When those branches switch (more gates switching) then those branches are on and drawing current and add to the overall sum of current (and power) being drawn. In terms of resistance, you could view it as the branches being infinite resistance when off (thus disregarded) and creating resistors in parallel when on. The voltage would always be constant. This is disregarding power management circuitry and assuming a clean digital signal (which assumptions I also made in my previous post). From a top level perspective you could say that the resistance looking into the CPU has decreased and thus current increased. It doesn't really explain what is really happening inside the CPU but it's also not inaccurate.

Thanks for taking the time to reply. As a mechanical engineer my electrical knowledge is limited. So yeah, I tend to think of things in a more classical manner when it comes to voltage and power.

 

[mikk]

What is this: https://www.anandtech.com/show/17078/intel-alder-lake-ddr5-memory-scaling-analysis/4

RAM scaling test in 4k/1440p with a GTX 1080, this is great

Next time Anandtech please use the iGPU to make sure it's even more GPU bound.

 

[ondma]

What is this: https://www.anandtech.com/show/17078/intel-alder-lake-ddr5-memory-scaling-analysis/4

RAM scaling test in 4k/1440p with a GTX 1080, this is great

Next time Anandtech please use the iGPU to make sure it's even more GPU bound.

Yea, Anand Tech seriously needs to update their gpu. Their gaming tests are pretty much worthless these days.

 

[Doug S]

The ring bus bandwidth is actually the L3 bandwidth for the cores. So having a 4.7GHz ring would mean it would be clocked faster than the E cores themselves.

Don't think I ever heard of the caches clocking faster than the CPU cores. Since the E cores have a different design philosophy and it's their first successful(first implementation is Lakefield) hybrid implementation, the E cores may simply not be capable of having the caches clocked faster.

If we also take the speculation that Alderlake was similar to Broadwell and desktop is a side effect, at the mobile frequencies the ring bus issue would be negligible since the clocks are way lower.

Given how far L3 is from cores these days (in terms of cycles of latency) it acts more like DRAM than more closely coupled L1/L2 cache, so it would make sense to me that L3 should support separate clock domains as it done for CPU and DRAM. I mean I sure hope they aren't slowing down the DRAM clock rate when E cores are active but instead using different multipliers for P cores and E cores.

I'm willing to bet Apple's SLC doesn't suffer from this limitation, or at least I haven't seen anything in benchmarks that would indicate it does (have you seen anything @name99?) Now obviously Apple's SLC connects to more than just big and little cores, since it is used by the GPU, NPU etc. It is also tied directly to the memory controllers (i.e. it may be that it is better conceptualized as a buffer for the memory controllers than as a traditional top level cache, especially where stores are concerned) so its clock rate is probably based on the LPDDR5 clock rate.

 

[IntelUser2000]

I mean I sure hope they aren't slowing down the DRAM clock rate when E cores are active but instead using different multipliers for P cores and E cores.

The "frequency" of the DRAM is really much lower while for caches it's the real frequency. Hence the referring of RAM speeds as MT/s. But you know that. Yes, I hope there's a better solution to this.

I'm willing to bet Apple's SLC doesn't suffer from this limitation, or at least I haven't seen anything in benchmarks that would indicate it does (have you seen anything @name99?)

Apple doesn't have to worry about clocking it at 5GHz, which should simplify lots of things. Sandy Bridge had a full speed L3 cache, but they made it asynchronous on Haswell. Obviously even with SNB's clocks synchronous L3 caches were possible.

You can see it from Gracemont that making it clock maximum 3.9GHz simplifies lots of things. Backing down the pipeline stage to 13, 3 cycle L1 caches, and other details that they haven't described.

I am betting Intel's implementation of Golden Cove isn't their best, and assuming they are really back, we'll see a good implementation of Cove cores that'll better compete with Apple's cores.

Like I said, it's not just Apple's team executing superbly, there's the factor of Intel's team failing the last 5 years.

 

[Hulk]

When P and E core frequencies are set to "Auto" in the BIOS my multicore P core frequency is 4.7 and single core 4.9. For the E's it's 3.6 and 3.8. I have a 12700k.

I'm wondering if this is what other people are seeing what what you are seeing at default with 12600k and 12900k?

I don't like the way Intel is specifying clocks in the ARK.
Max Turbo Boost 3.0/Max Turbo Boost is specified at 5.0 GHz
P-Core Max Turbo - 4.9
E-Core Max - 3.6

Base frequencies are superfluous since all it really does is tell you clocks at 125W, which no one is going to actually run.

What would be nice to know, simply, is what 1C and nC the P's and E's will run at under default settings assuming adequate power and cooling. My PL1=PL2=4096W yet single core clocks will never reach 5.0 as specified unless I force it. I liked it when Intel would actually provide Anandtech with a table showing clocks at 1C, 2C, 4C, and 8C.

Just wondering what insights into these specs and behaviors I'm missing? Because I usually am missing something

 

[geegee83]

The estimated Pdyn = (1/2) * CL* (Number of gates switching) * Freq * Voltage^2

This equation gives good estimate of power. From voltage alone, a 20% increase in voltage causes a 44% increase in power.

Assuming similar Cdyn, going 2x freq and 20% higher voltage is 2.88x increase in power.

 

[TheELF]

Base frequencies are superfluous since all it really does is tell you clocks at 125W, which no one is going to actually run.

What would be nice to know, simply, is what 1C and nC the P's and E's will run at under default settings assuming adequate power and cooling. My PL1=PL2=4096W yet single core clocks will never reach 5.0 as specified unless I force it. I liked it when Intel would actually provide Anandtech with a table showing clocks at 1C, 2C, 4C, and 8C.

It's because the cpu now is adaptive and will give you the best possible clocks under the conditions you have it running under, forcing a table would leave too much performance unused and would be completely useless for practically everybody since every single piece of software uses a different amount of power and thus a cpu runs them at different clocks.
Baseclocks tells you clocks at 125W under the heaviest workload possible, that's what they guarantee you will get and anything beyond that is adaptive and depends on all the conditions.

 

[IntelUser2000]

Base frequencies are superfluous since all it really does is tell you clocks at 125W, which no one is going to actually run.

Yes, I want to further clarify TheELF's point on this.

In workloads like LinX where it takes nearly 100% advantage of the CPU, it might run at Base at 125W.

But under Cinebench it might be Base+2 even at the same 125W TDP. Then if you run something like Geekbench it might be Base+5.

Actually in most workloads it'll go way above base even under multi-threaded workloads.

Remember, the CPU "knows" how demanding the workload is and adjusts frequency using that knowledge. Before Sandy Bridge Turbo 2.0, if you ran something less demanding it would run at similar clocks but just use less power.

Base still matters, it's just that the scenario where it'll run at base clocks will be less and less because of advancing power management features. In mobile it'll often dip quite a bit below base when CPU and iGPU are simultaneously stressed. For those chips nowadays Base is guaranteed frequency when only CPU is active since it's playing loose with the rules.

 

[lobz]

HWUB investigates if you should disable e-cores to play games. Short Answer: No.

Long answer: No, you shouldn't.

 

[coercitiv]

When P and E core frequencies are set to "Auto" in the BIOS my multicore P core frequency is 4.7 and single core 4.9. For the E's it's 3.6 and 3.8. I have a 12700k.

My PL1=PL2=4096W yet single core clocks will never reach 5.0 as specified unless I force it.

Just wondering what insights into these specs and behaviors I'm missing? Because I usually am missing something

Who summoned me?! Oh, it's the @Hulk again.

Here's the short bad news: On stock 12700K you'll rarely see 5Ghz as this turbo bin is reserved for times when just 1 core is loaded. For up to 4 cores you get 4.9Ghz, for up to 6 cores you get 4.8, all-core turbo is 4.7.

Here's the long good news: all P-cores in ADL-S come with their own predefined V/f curve mapped up to the highest turbo ratio the SKU can handle. That means each P-core can do 5Ghz and the CPU already knows what voltage each one of them needs. Remember when you were asking me about the purpose of the V/f curve while hinting that we're only really interested in power? Well.... THIS is what we want that voltage curve for (among other things): customizing the system to our hearts content!

With Alder Lake you can define dynamic overclocks, meaning you can still use the mapped VIDs up until the CPU turbos past the max stock clocks. Here's how you can do this:

• set you CPU voltage option to Adaptive
• re-define your 5Ghz group to more cores, say 4 cores to 5Ghz, 6 cores to 4.8 etc. Test and see if this holds in Windows, in my case the BIOS is wonky and does not register 4 cores to 5Ghz as "technical" overclock, therefore sticks to stock behavior. (I'm on MSI, you're on Asus, your mileage may vary though Asus seems to have the more mature UEFI right now)
• in case the 5Ghz route does not work, set 1 or 2 cores to 5.1Ghz. While operating at 5Ghz and bellow, the CPU will ask for stock voltage, while operating at 5.1Ghz it will ask for either the 5Ghz voltage or the voltage defined in the UEFI voltage field.
• if you're running a 5.1Ghz overclock, you can choose to set a voltage for this point. Take note that this voltage must be higher than the 5Ghz VID of your CPU, otherwise the CPU will ignore it and use the 5Ghz voltage instead.
• don't be a bad @Hulk and set a proper power limit for the CPU. Alder Lake can eat your cake and poop on your carpet if you let it, just set a proper max power when running on air even if it's a 200W limit. This way it will only eat your cake and poop in a corner.

For now I run my 12700K with 5.1Ghz at up to 2 cores, 5Ghz at 4 cores, 4.8 at 6 cores, 4.6 at 8 cores with PL1= PL2 = 150W. Since MSI always manages to push more voltage than necessary I'm also running Adaptive + Offset. Would have liked to keep running Adaptive + Advanced Offset so that the offset is higher and limited to high turbo bins... alas they managed to screw this option in the last UEFI revision.

What's that? You have questions?! No no no, I'm holiday cheering and all. Here's a 96 minute long Alder Lake tutorial on everything, from voltage rails to memory overclocking.

 

[Hulk]

Who summoned me?! Oh, it's the @Hulk again.

Here's the short bad news: On stock 12700K you'll rarely see 5Ghz as this turbo bin is reserved for times when just 1 core is loaded. For up to 4 cores you get 4.9Ghz, for up to 6 cores you get 4.8, all-core turbo is 4.7.

Here's the long good news: all P-cores in ADL-S come with their own predefined V/f curve mapped up to the highest turbo ratio the SKU can handle. That means each P-core can do 5Ghz and the CPU already knows what voltage each one of them needs. Remember when you were asking me about the purpose of the V/f curve while hinting that we're only really interested in power? Well.... THIS is what we want that voltage curve for (among other things): customizing the system to our hearts content!

With Alder Lake you can define dynamic overclocks, meaning you can still use the mapped VIDs up until the CPU turbos past the max stock clocks. Here's how you can do this:

• set you CPU voltage option to Adaptive
• re-define your 5Ghz group to more cores, say 4 cores to 5Ghz, 6 cores to 4.8 etc. Test and see if this holds in Windows, in my case the BIOS is wonky and does not register 4 cores to 5Ghz as "technical" overclock, therefore sticks to stock behavior. (I'm on MSI, you're on Asus, your mileage may vary though Asus seems to have the more mature UEFI right now)
• in case the 5Ghz route does not work, set 1 or 2 cores to 5.1Ghz. While operating at 5Ghz and bellow, the CPU will ask for stock voltage, while operating at 5.1Ghz it will ask for either the 5Ghz voltage or the voltage defined in the UEFI voltage field.
• if you're running a 5.1Ghz overclock, you can choose to set a voltage for this point. Take note that this voltage must be higher than the 5Ghz VID of your CPU, otherwise the CPU will ignore it and use the 5Ghz instead.
• don't be a bad @Hulk and set a proper power limit for the CPU. Alder Lake can eat your cake and poop on your carpet if you let it, just set a proper max power when running on air even if it's a 200W limit. This way it will only eat your cake and poop in a corner.

For now I run my 12700K with 5.1Ghz at up to 2 cores, 5Ghz at 4 cores, 4.8 at 6 cores, 4.6 at 8 cores with PL1= PL2 = 150W. Since MSI always manages to push more voltage than necessary I'm also running Adaptive + Offset. Would have liked to keep running Adaptive + Advanced Offset so that the offset is higher and limited to high turbo bins... alas they managed to screw this option in the last UEFI revision.

What's that? You have questions?! No no no, I'm holiday cheering and all. Here's a 96 minute long Alder Lake tutorial on everything, from voltage rails to memory overclocking.

Wow! Thanks for the early Christmas gift!

I've been recording CPUmark99 scores for... well since it came out. Anyway, the benchmark is long out of date, single thread, not very parallel, and in general not a good indication of modern cpu performance. But it only takes a minute to update my chart so I did it. For some reason I get a less performant result for Golden Cove than I expected. I doubled checked clocks and reran the bench a bunch of times. Most of the scores in the test are from my rigs and/or have been verified against other scores I trust.

If anyone wants the CPUmark99.exe it's portable and is only 573kb so I can get it to you.

So, without further ado..

 

[Hulk]

Here is the V vs. F plot for my 12700K as shown by the BIOS.
One thing I don't understand is that when set to 47 voltage is shown as 1.296, but when cores are set to "auto", which is also 47 the BIOS reports target voltage of 1.243?
Looks like for my CPU 46 or 47 is about as high as I want to go before the voltage starts getting a little high for my liking. I like to stay under 1.3V.
Would love to seem some other plots for Alder Lake owners in this forum?
I couldn't find a place in my BIOS for these setting so I just set the ratio, restart, set ratio, restart, until I had enough points where I felt confident in the plot shape.

 

[JoeRambo]

One thing I don't understand is that when set to 47 voltage is shown as 1.296, but when cores are set to "auto", which is also 47 the BIOS reports target voltage of 1.243?

Auto should be for base frequency, that is 3.6Ghz. Since you also have E cores enabled and Uncore is also asking for certain VID, the max is selected and that is most likely 1.243 for E-Cores @3.6ish Ghz or so.

Good video on this topic:

This what ScatterBench is getting for P cores ( with E-Cores disabled and Ring set to 8 to not interfere with VID requests )

 

[coercitiv]

Here is the V vs. F plot for my 12700K as shown by the BIOS.
One thing I don't understand is that when set to 47 voltage is shown as 1.296, but when cores are set to "auto", which is also 47 the BIOS reports target voltage of 1.243?
Looks like for my CPU 46 or 47 is about as high as I want to go before the voltage starts getting a little high for my liking. I like to stay under 1.3V.

~1.3V is likely enough for 5Ghz, let alone 4.7Ghz. What you're seeing by dialing in values in the BIOS and then checking the resulting voltage is the combined effect of the CPU V/f curve and your motherboard's settings. The final VID request from the CPU is based on it's internal V/f curve to which the CPU then makes adjustments based on information from the motherboard regarding it's power delivery capabilities. Motherboards will present themselves with different characteristics to the CPU, which means the same CPU may end up using 1.4V on one board and 1.35V on another. The difference can be massive, affecting both power consumption and temps. Sometimes the higher voltage is justified by lower quality VRM capabilities, on other occasions we're simply witnessing poor BIOS optimization or even poor marketing choices from the board maker.

On the first day I powered the 12700K I got myself a thermal limit throttle from a game that used just 30W on average. I was running it to check my case fan config, imagine my surprise to see the throttle indicator while CPU fans didn't even have the time to spin up properly. There was a spike in CPU usage at some point and voltage from stock Auto settings went to.... 1.47V! "Great" auto config from MSI, been running with static voltage or Adaptive+Offset ever since.

 

[Hulk]

Who summoned me?! Oh, it's the @Hulk again.

Here's the short bad news: On stock 12700K you'll rarely see 5Ghz as this turbo bin is reserved for times when just 1 core is loaded. For up to 4 cores you get 4.9Ghz, for up to 6 cores you get 4.8, all-core turbo is 4.7.

Here's the long good news: all P-cores in ADL-S come with their own predefined V/f curve mapped up to the highest turbo ratio the SKU can handle. That means each P-core can do 5Ghz and the CPU already knows what voltage each one of them needs. Remember when you were asking me about the purpose of the V/f curve while hinting that we're only really interested in power? Well.... THIS is what we want that voltage curve for (among other things): customizing the system to our hearts content!

With Alder Lake you can define dynamic overclocks, meaning you can still use the mapped VIDs up until the CPU turbos past the max stock clocks. Here's how you can do this:

• set you CPU voltage option to Adaptive
• re-define your 5Ghz group to more cores, say 4 cores to 5Ghz, 6 cores to 4.8 etc. Test and see if this holds in Windows, in my case the BIOS is wonky and does not register 4 cores to 5Ghz as "technical" overclock, therefore sticks to stock behavior. (I'm on MSI, you're on Asus, your mileage may vary though Asus seems to have the more mature UEFI right now)
• in case the 5Ghz route does not work, set 1 or 2 cores to 5.1Ghz. While operating at 5Ghz and bellow, the CPU will ask for stock voltage, while operating at 5.1Ghz it will ask for either the 5Ghz voltage or the voltage defined in the UEFI voltage field.
• if you're running a 5.1Ghz overclock, you can choose to set a voltage for this point. Take note that this voltage must be higher than the 5Ghz VID of your CPU, otherwise the CPU will ignore it and use the 5Ghz voltage instead.
• don't be a bad @Hulk and set a proper power limit for the CPU. Alder Lake can eat your cake and poop on your carpet if you let it, just set a proper max power when running on air even if it's a 200W limit. This way it will only eat your cake and poop in a corner.

For now I run my 12700K with 5.1Ghz at up to 2 cores, 5Ghz at 4 cores, 4.8 at 6 cores, 4.6 at 8 cores with PL1= PL2 = 150W. Since MSI always manages to push more voltage than necessary I'm also running Adaptive + Offset. Would have liked to keep running Adaptive + Advanced Offset so that the offset is higher and limited to high turbo bins... alas they managed to screw this option in the last UEFI revision.

What's that? You have questions?! No no no, I'm holiday cheering and all. Here's a 96 minute long Alder Lake tutorial on everything, from voltage rails to memory overclocking.

Wow. That guy really does a deep dive on the mudderboard.
Very informative. Funny thing is after going through every feature at the end he basically says "pick a max OC ratio and leave everything on auto!"

 

[igor_kavinski]

Intel Alder Lake's Integrated UHD Graphics 770 GPU Overclocks Like Crazy, Almost Hits 2.4 GHz on Water Cooled Setup With Over 60% Performance Gains

Intel's Alder Lake Desktop CPUs are great but the UHD 770 iGPU is one insane overclocker, hitting almost Xbox One performance levels.

wccftech.com

Good news for gamers on a budget.

 

[TESKATLIPOKA]

Intel Alder Lake's Integrated UHD Graphics 770 GPU Overclocks Like Crazy, Almost Hits 2.4 GHz on Water Cooled Setup With Over 60% Performance Gains

Intel's Alder Lake Desktop CPUs are great but the UHD 770 iGPU is one insane overclocker, hitting almost Xbox One performance levels.

wccftech.com

Good news for gamers on a budget.

Not that good news for desktop users, because UHD 770 with 32EU is really weak and 40-50% higher performance won't change that.
On the other hand, OC-ing a mobile version to 2GHz could be very interesting, If some App allowed this.

I made a table from those results:

i9-12900K	Stock via Bios	OC Strategy 1	OC Strategy 2	OC Strategy 3 (BCLK 110)	OC Strategy 4 (BCLK 116)
Slice (MHz)	1550 [100%]	1550 [100%]	2100 [136%]	2255 [146%]	2378 [153%]
Unslice (MHz)	1350 [100%]	1350 [100%]	1350 [100%]	1485 [110%]	1566 [116%]
Horsepower (TFLOPs)	794	794	1075	1155	1218
Memory speed (MHz)	4800	6200	6200	6160	6264
Voltage (V)	1.081	1.079	1.088	1.211	1.375
IGP Temperature [°C]	37	37	41	48	60
Power consumption (W)	14.47 [100%]	14.47 [100%]	19.83 [137%]	24.63 [169%]	31.7 [219%]
Performance in FF XV (FPS)	14.55 [100%]	14.74 [101%]	18.64 [128%]	19.69 [135%]	20.48 [141%]

OC Strategy 2 is very good. You gain 28% higher performance in FF XV while the power consumption in Furmark is only 37% higher, so even efficiency is not much worse compared to stock.

 

[igor_kavinski]

On the other hand, OC-ing a mobile version to 2GHz could be very interesting.

Anyone tried that before? Does XTU let users OC mobile SKUs?

 

[TESKATLIPOKA]

Anyone tried that before? Does XTU let users OC mobile SKUs?

Sorry, It can't. Just tried on my i5-9300H and I think It will be the same for other Intel CPUs.

 

[Asterox]

Hm it looks cool, but hm 70-80c is expected for that tiny size.

https://twitter.com/x/status/1474975081986392065

 

[TheELF]

Hm it looks cool, but hm 70-80c is expected for that tiny size.

Even 80 is great for a gaming rig, that's more than 20 degrees away from thermal throttling, if this is at full load all cores and max 150W all the time then these are great numbers for the cooler because games will use much less of the cpu.