http://www.ccixconsortium.com/
Cache Coherent Interconnect for Accelerators (CCIX)
Cache Coherent Interconnect for Accelerators (CCIX)
Open Acceleration Framework for Data Centers and Other Markets
Accelerating applications in the data center has become a requirement due to power and space constraints. Applications such as big data analytics, search, machine learning, NFV, wireless 4G/5G, in-memory database processing, video analytics, and network processing, benefit from acceleration engines that need to move data seamlessly among the various system components.
Connecting Processor Architecture and Accelerators Seamlessly
CCIX will allow components to access and process data irrespective of where it resides, without the need for complex programming environments. This ability to access data coherently dramatically improves performance and usability by enabling a driver-less and interrupt-less usage model. Additional capabilities include:
- Both off-load and bump-in-the-wire inline application acceleration while leveraging existing server ecosystems and form factors thereby improving total cost of ownership (TCO)
- Higher bandwidth compared to the existing interface
- Orders of magnitude improvement in application latency
- Seamless processor and accelerator hardware cache coherency support
Widespread Collaboration among Industry Technology Leaders
For the first time in the industry, a single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators such as GPUs, FPGAs, Smart Interconnects and enable efficient heterogeneous computing - significantly improving compute efficiency for servers running data center workloads. Advanced Micro Devices, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx have joined forces to bring this high-performance open acceleration framework to the industry.
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