NostaSeronx
Diamond Member
- Sep 18, 2011
- 3,801
- 1,284
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Jaguar/Puma Core/FPU Resources:
Core:
1 ALU + 1 ALU/Mul/Div + 1 Load AGU + 1 Store AGU
FPU:
1 VALU/ViMUL/FPADD + 1 VALU/StoreConv/FPMUL
Bulldozer Core/FPU Resources:
Core:
1 ALU + 1 ALU/Mul + 2 AGLUs
FPU:
1 VFMA/Fconv/VI + 1 VFMA/Flogic + 1 VALU + 1 VALU/Fstore
Piledriver Core/FPU Resources:
Core:
1 ALU/Div + 1 ALU/Mul + 2 AGLUs/Mov
FPU:
1 VFMA/Fconv/VI + 1 VFMA/Flogic + 1 VALU + 1 VALU/Fstore
SteamrollerB Core/FPU:
Core:
1 ALU/Div + 1 ALU/Mul + 2 ALUs + 4 AGLUs/Mov
FPU:
1 VFMA/Fconv/VI/VALU + 1 VFMA/FLL + 1 VALU/Fstore/Fshuf
(KV-A1 has the 2 simple ALUs units and 2 of the four AGLU/Mov units disabled)
---
IPC doesn't care about bit size capability so I am ignoring implementing those.
128b Vector vs 256b Vector = 1 instruction, 4 GFlops vs 8 GFlops, 2x GFlops if FMA.
---
@IDC, the ML-A0 samples came out within the RHS Box for 28nm FDSOI. I noticed the same behavior for KV-A0 samples that were in the RHS Box for 28nm SHP. Beema and Mullins are most likely on the 28nm FDSOI node for easy implementation of per core Wide DVFS.
ML-A1, A10 Micro-6700T, 4W;
Idle/Gated: 0.25 volts, 1 GHz
Base: 0.575 volts, 1.6 GHz
Boost: 0.925 volts, 2.2 GHz
^-- pretty wide range.
Core:
1 ALU + 1 ALU/Mul/Div + 1 Load AGU + 1 Store AGU
FPU:
1 VALU/ViMUL/FPADD + 1 VALU/StoreConv/FPMUL
Bulldozer Core/FPU Resources:
Core:
1 ALU + 1 ALU/Mul + 2 AGLUs
FPU:
1 VFMA/Fconv/VI + 1 VFMA/Flogic + 1 VALU + 1 VALU/Fstore
Piledriver Core/FPU Resources:
Core:
1 ALU/Div + 1 ALU/Mul + 2 AGLUs/Mov
FPU:
1 VFMA/Fconv/VI + 1 VFMA/Flogic + 1 VALU + 1 VALU/Fstore
SteamrollerB Core/FPU:
Core:
1 ALU/Div + 1 ALU/Mul + 2 ALUs + 4 AGLUs/Mov
FPU:
1 VFMA/Fconv/VI/VALU + 1 VFMA/FLL + 1 VALU/Fstore/Fshuf
(KV-A1 has the 2 simple ALUs units and 2 of the four AGLU/Mov units disabled)
---
IPC doesn't care about bit size capability so I am ignoring implementing those.
128b Vector vs 256b Vector = 1 instruction, 4 GFlops vs 8 GFlops, 2x GFlops if FMA.
---
@IDC, the ML-A0 samples came out within the RHS Box for 28nm FDSOI. I noticed the same behavior for KV-A0 samples that were in the RHS Box for 28nm SHP. Beema and Mullins are most likely on the 28nm FDSOI node for easy implementation of per core Wide DVFS.
ML-A1, A10 Micro-6700T, 4W;
Idle/Gated: 0.25 volts, 1 GHz
Base: 0.575 volts, 1.6 GHz
Boost: 0.925 volts, 2.2 GHz
^-- pretty wide range.
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