AMD Bristol/Stoney Ridge Thread

[The Stilt]

All AM4 motherboards must support all AM4 APUs / CPUs, obviously. So a motherboard "designed specifically" to be used with Zeppelin, must have the VDD_SoC high-current secondary power plane for the UNB (CNB + GNB) in Bristol Ridge / Raven. Zeppelin will naturally use VDD_SoC power plane despite it lacks any kind of ODG, so the only practical difference in the requirements is the VDD_SoC plane power delivery capability. Think AM4 as a new FM2 socket.

 

[superstition]

One way AMD can get around that (in terms of cost inflation for the platform's boards), if AM4 processors, at some point in time, can clock high, is by releasing parts with low TDPs (less than or equal to 125) but which are unlocked. At that point, any overclocking performance will depend upon the robustness of the particular board. The division will therefore fall between budget non-overclocking boards and boards capable of overclocking. This, though, unfortunately maintains the confusing grey area for consumers, in terms of what their boards are capable of beyond stock. A better system would be for boards to be clearly labeled with their maximum supported TDP (with the same variables in place concerning cooling effectiveness for the CPU and VRMs).

What is the maximum CPU TDP for the AM4 specification, the one all boards have to be capable of supporting?

 

[The Stilt]

What is the maximum CPU TDP for the AM4 specification, the one all boards have to be capable of supporting?

95W with the current infrastructure levels, compatible with Bristol and Summit Ridge and Raven.

 

[inf64]

95W with the current infrastructure levels, compatible with Bristol and Summit Ridge and Raven.

Is there a reason why AMD opted for max. 95W and ditched the 125W level?

 

[The Stilt]

Is there a reason why AMD opted for max. 95W and ditched the 125W level?

I don't know the facts, that I would imagine it has something to do with the process characteristics. The existing 14nm LPP products have already illustrated that beyond a certain point the increase in voltage provides very diminishing returns. Also Intel consumer parts are all < 95W.

 

[superstition]

Is there a reason why AMD opted for max. 95W and ditched the 125W level?

Probably to get motherboard makers on board more easily since it's not as hard to guarantee 95W operation for all boards. AMD will have to either leave it open for board makers to offer "overclocking" boards for low TDP stock CPUs or come out with AM4+ for higher-end enthusiasts at some point.

 

[Abwx]

Is there a reason why AMD opted for max. 95W and ditched the 125W level?

That s 95W for the CPU but the GPU has a separate power supply, if this latter is say 55W then the plateform is actually 150W, and given the presence of these two supplies limiting the CPU at 95W will neuter the added cost.

 

[Exist50]

That s 95W for the CPU but the GPU has a separate power supply, if this latter is say 55W then the plateform is actually 150W, and given the presence of these two supplies limiting the CPU at 95W will neuter the added cost.

Uh, can you explain? It seems far, far more likely that 95W would be the tdp for the entire SoC. After all, the term "tdp" loses a lot of meaning if you take it to apply to different components on the same die.

 

[Abwx]

Uh, can you explain? It seems far, far more likely that 95W would be the tdp for the entire SoC. After all, the term "tdp" loses a lot of meaning if you take it to apply to different components on the same die.

Zen 8C has no GPU and is 95W, given that it will use any AM4 MB that mean that the CPU power plane is 95W in all MBs, whatever the GPU specific supply capabilites..

 

[jpiniero]

Zen 8C has no GPU and is 95W, given that it will use any AM4 MB that mean that the CPU power plane is 95W in all MBs, whatever the GPU specific supply capabilites..

That's not how it works really. Plus I doubt AMD would release any multiple die parts on AM4; presumably Zen Server is on a different socket.

 

[The Stilt]

95W TDP Zeppelin parts should draw around ~ 80W from the primary (VDDC, CPU core) power plane. The rest (~15W) is for the northbridge, IO, FCH, etc and will be drawn from the secondary VDD_SoC plane and other minor, low-current planes. Meanwhile on the 95W APUs for example the portion drawn by the CPU cores would be smaller (e.g 40W) and the portion drawn from the secondary plane (VDD_SoC) significantly higher, since the iGPU will be powered from this plane.

 

[Abwx]

That's not how it works really. Plus I doubt AMD would release any multiple die parts on AM4; presumably Zen Server is on a different socket.

So how does it work, could you explain.?.

As for multiple dies parts what are you talking about, Zen 8C is a single die and will be supported by AM4 MBs, i thought that anybody knew this at this point, but seems that there s exceptions...

The rest (~15W) is for the northbridge, IO, FCH, etc and will be drawn from the secondary VDD_SoC plane and other minor, low-current planes.

That s unlikely as that would mean that in an APU all thoses parts supply voltage would be dependant of the GPU supply voltage requirements at a given moment, wich does not make sense as thoses parts are primarly linked to the CPU and their power requirements and activities are function of the CPU throughput and activity, as such the logic say that they share the same supply as the CPU.

 

[The Stilt]

That s unlikely as that would mean that in an APU all thoses parts supply voltage would be dependant of the GPU supply voltage requirements at a given moment, wich does not make sense as thoses parts are primarly linked to the CPU and their power requirements and activities are function of the CPU throughput and activity, as such the logic say that they share the same supply as the CPU.

Ok, so you are not familiar how it has been made since the first APU.

 

[Abwx]

Ok, so you are not familiar how it has been made since the first APU.

That s a hollow statement that consist to claim that you are right and that i would be wrong, generaly when i do so i subsantiate wih technical explanations...

So far they previously used a single power plane, as for Carrizo that s a relatively low power APU, nothing to do with the 65W BR, and even then i doubt that the supply routing is made as you stated fo the reason i previously explained, and it s not a blanket statement of yours that will be a valuable counter argument..

 

[PhonakV30]

AMD Pro A12-9800B ?
Link : http://www.cpubenchmark.net/cpu.php?cpu=AMD+PRO+A12-9800B&id=2840
Also compare to Carrizo (AMD Pro A12-8800B) : http://www.cpubenchmark.net/cpu.php?cpu=AMD+PRO+A12-8800B&id=2610

 

[The Stilt]

As said before, it is silly to expect any significant performance improvements from the increased clocks over FX-8800/B since they are both fully limited by the power budget and not by the clocks.

 

[The Stilt]

Could someone explain me the math behind this (no endnotes available)?

The fastest officially supported memory speed on Godavari is 2133MHz (34128MB/s). The fastest officially supported, and the fastest possible (without increasing the BCLK) memory speed on Bristol Ridge is 2400MHz (38400MB/s).
How does 12.51% difference become 22%?

 

[Abwx]

Quick test of the FX 9800P :

http://www.jagatreview.com/2016/06/hands-on-preview-amd-fx-9800p-bristol-ridge-apu-7th-gen/

 

[kraatus77]

Could someone explain me the math behind this (no endnotes available)?

The fastest officially supported memory speed on Godavari is 2133MHz (34128MB/s). The fastest officially supported, and the fastest possible (without increasing the BCLK) memory speed on Bristol Ridge is 2400MHz (38400MB/s).
How does 12.51% difference become 22%?

Godavari's 34128MB/s is theoretical, real world bandwidth would be lot less, same with Bristol Ridge 's 38400MB/s. but on BR it would be closer to it's max theoretical bandwidth. ( more efficient IMC). thus 22% increase instead of theoretical 12.51%.

That's what i think.

 

[The Stilt]

The HP x360 ENVY, which was discussed few days back. Not only it has the STAPM disabled, but it also has just a single memory slot on board. Dual channel is only possible when soldered-down DRAM and SO-DIMM are used together.

https://hardforum.com/threads/unboxing-1st-impressions-hp-envy-x360-w-amd-fx-9800p.1902487/

 

[PhonakV30]

So for Intel Core i7-6500u, What would the result look like under 2 Cores/2 Threads?

 

[The Stilt]

So for Intel Core i7-6500u, What would the result look like under 2 Cores/2 Threads?

Around 195 - 200.

 

[PhonakV30]

In that case ,
244/4 = 61 per thread
250/4 = 62.5 per thread
If only 2 cores/2 threads = 97.5 - 100 per thread for Intel 6500u.
Single thread : 97.5/61 = 59% (at least)
But depend on situation, I think Fx-9800p is decent APU.

 

[mikk]

So for Intel Core i7-6500u, What would the result look like under 2 Cores/2 Threads?

This is a very poor i7-6500U score, it scores over 300 usually.

http://www.notebookcheck.net/Intel-Core-i7-6500U-Notebook-Processor.149431.0.html

 

[Sweepr]

This is a very poor i7-6500U score, it scores over 300 usually.

http://www.notebookcheck.net/Intel-Core-i7-6500U-Notebook-Processor.149431.0.html

And i7-7500U scores 363 pts.