So Nosta, Stoney Ridge will go to 22nm?
It could go up to 3.5 Ghz or try to emulate Atom by reducing consumption...
Stoney Ridge's design 2C/3CU isn't getting the port, but Bristol Ridge's design 4C/8CU is.
22FDX+ if everything is included (confirmed(SiBCN spacers+15nm BOX)+unconfirmed(New Titanium gate stack(scalable to sub-5nm)+potential shrink+cobalt MOL)) then 3.5 GHz isn't the limit. 22FDX+ with the A9-9420 would be 5.1 GHz(base)/5.4 GHz(boost)/1.44 GHz(iGPU) w/ a 10 watt TDP. (70% perf boost and 40% power shrink and ~30% lower cost).
I am saying Bristol Ridge, but it isn't actually Bristol Ridge. It is a hawk design with the 4C/8CU design.
//Not related to the quote, but is related to the reply.
Now my theory of the speculation pipeline;
Zen-Lite -> Broadcom Vulcan -> 15h architecture
//section 1a
Patent #A shows a 2 ALU + 2 AGU design with the Mapper and the individual ALUQ and AGUQ from Zen.
Patent #B points to a unified scheduler Mapper(Int Core) and NSQ(FPU) effectively fused. Which means that there is a FPUQ as well, not sure if it is FPUQU(Unified FPU queue) or FPUQ0-2(Individual FPU queues).
Patent #C points to a unified cluster; Integer + Memory + Floating Point. It isn't a matrix of ports like Intel's core series. Instead, the FPU instruction path coalesces with the Integer core rename. While, it is also diverges into a separate function unit. Dispatch goes to one cluster than two clusters in regards to Integer + FPU in standard 15h designs.
Taking that information in application patents...(not sure when they'll be granted)..
2 ALUs ALUQ0-ALUQ1
2 AGUs AGUQ0-AGUQ1
1 FMAC(P0 from Excavator)+1 FMUL(P0 from Zen)+1 FADD(P2 from Zen) (Complex FMACs are handled by P0, and Simple FMACs are handled by P1+P2) FPUQx
^- that is all for one core. There is two cores in a module. So; 4 ALUs/4 AGUs/6 FPUs in module. In theory, the ideal decode is the 4-wide Zen decode split between the two cores. (2-wide for each core)
// section 1b
Broadcom Vulcan comes from Patent #D; which hint at Vulcan's successor SVE implementation ported to x86.
US9880848B2
US9336004B2 <-- this one "The set of architectural registers may include 48 registers: 16 integer registers and 32 floating-point registers."
SVE is Z0-Z31 and AVX512 is XYZMM0-31, while ARMv8 has 31 integer registers, but x86 has 16 integer registers. So, it is clearly x86-AVX512.
(AVX512VL gets compressed into RISC SVE-like ops; if you didn't get what I was inferring.)
Also, note the patents are ASF/TSX related.
// section 1c
Everything in Zen-Lite is also in Zen; the full Zen macro suite is the same. In this case, though Zen-Lite is a swap of the Excavator macros(which were Bulldozer-derived not Zen-derived). (If Zen-Lite was Jaguar-based it would have a Load AGU and Store AGU.) Overall, the core provides the same capabilities just better. While, mostly if not fully utilizing Zen macros in the physical design. Zen is effectively the Skylake-X/Icelake-Server core, while Zen-lite is the Skylake/Icelake-Mainstream core.
Zen-Lite rather than get a new front-end, reuses the Zen front-end. This in turn locks Zen-Lite to a Cluster-based Multithreading architecture. SMT2 to CMT2 conversion is easy with a capable front-end that can do either SMT or CMT.
// section 2 of speculation
22FDX is meant for Low Power and MRAM-F applications. (MRAM-F = Flash-replace)
22FDX+ is meant for High Performance and MRAM-S applications. (MRAM-S = SRAM-replace)((MRAM-S is pSTT-MRAM))
The L2 cache in a CMT design would definitely benefit from MRAM. The L2 in Excavator and Zen is mostly 6T SRAM. So, standard MRAM-S(1MTJ+1T), not the high performance MRAM-S (2MTJ+4T or something). 1 MB of MRAM is about the same size as 256 KB SRAM; perf/power is better with the MRAM cache. (I do not think MRAM will be used.)
https://pc.watch.impress.co.jp/docs/news/event/734644.html <--- IPC/EPI benchmark with MRAM.
L2 in this appears to be 2T/2MTJ.. so uh okay.
// section 3;
Only 1 foundry for 12LP/7LP; Malta.
Has no copy-exact backups.
Only 5 foundries for 22FDX; Chengdu GloFo, Fab2 HLMC(HHFab6), Crolles2 STM, Agrate STM, Dresden GloFo. (STM is rebuilding Crolles2 and building a new 300mm Fab in Agrate).
China has 1 backup for 22nm FDSOI and Europe has 2 back ups for 22nm FDSOI. (All copy-exact; 1 design can be pushed to any foundry.)