AMD Carrizo APU Details Leaked

[Fjodor2001]

http://www.brightsideofnews.com/new...-details-leaked---soc-for-the-mainstream.aspx

Some highlights:

The new chip's codename is Carrizo and I had the chance to look at a document aimed at developers "Preliminary BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 15h Models 60h-6Fh Processors“, which documents some of the new features of this APU.
[...]
The CPU cores will be upgraded from Steamroller to Excavator. Thanks to a patch AMD submitted to the GCC project last September, we know that Excavator will add support for AVX2, BMI2, MOVBE and RDRAND instruction set extensions. Except for the TSX extensions found on select models, this brings the core to feature parity with Haswell.
[...]
The memory controller of Carrizo will feature support for both DDR3 and DDR4 memory technologies.
[...]
One of the main innovations of Carrizo is the integrated Fusion Controller Hub (FCH). It will feature two SATA 6Gb/s ports, four USB 3.0 ports and eight USB 2.0 ports.
[...]
On desktops Carrizo will drop into the known FM2+ socket and the integrated FCH will be disabled and the external FCH of the board used. This is an understandable tradeoff to avoid changing the motherboard infrastructure again.
[...]
The PCI-Express connectivity got a slight update as well. While Kaveri already had PCIe 3.0 for discrete graphics connectivity, the general purpose lanes were PCIe 2.0. In Carrizo all PCIe lanes are version 3.0, thus providing more bandwidth for addon devices.
[...]

Interesting that AMD will provide DDR4 support before Intel on mainstream desktop PCs, assuming AMD Carrizo is released before Intel Skylake.

 

[ElFenix]

So when might we see this?

 

[Insert_Nickname]

One of the main innovations of Carrizo is the integrated Fusion Controller Hub (FCH). It will feature two SATA 6Gb/s ports, four USB 3.0 ports and eight USB 2.0 ports.
[...]
On desktops Carrizo will drop into the known FM2+ socket and the integrated FCH will be disabled and the external FCH of the board used. This is an understandable tradeoff to avoid changing the motherboard infrastructure again.
[...]
The PCI-Express connectivity got a slight update as well. While Kaveri already had PCIe 3.0 for discrete graphics connectivity, the general purpose lanes were PCIe 2.0. In Carrizo all PCIe lanes are version 3.0, thus providing more bandwidth for addon devices.
[...]

Now, that is interesting. An integrated FCH for mobile, with an option for an external on the desktop models. I wonder if anyone will make a mainboard just using the integrated ones. Would be a killer HTPC chip. Especially if it has a H.265 decoder built-in.

Also it's about time the general purpose PCIe lanes are made 3.0 compliant...

 

[Erenhardt]

But why DDR4 controller? Will it be FM3 compatible?

So when might we see this?

I guess 6-9 month from now? Trinity -8 months> richland -6 months> Kaveri

 

[SlowSpyder]

I'm curious to see what AMD's plans are post-Excavator. This looks good, though. DDR4 or another memory controller, AMD has to do something if they want APU graphics performance to budge much more.

 

[monstercameron]

IMHO the only things they really need to pay attention to and fix is their bandwidth problems, latency problems and the various erratas in the uarch.

if they can get kaveri sku like the a10 down to 65W TDP and fix the above issues then they have something interesting on their hands, IMO that is.

 

[Arachnotronic]

http://www.brightsideofnews.com/new...-details-leaked---soc-for-the-mainstream.aspx

Some highlights:

Interesting that AMD will provide DDR4 support before Intel on mainstream desktop PCs, assuming AMD Carrizo is released before Intel Skylake.

Too little too late. Broadwell "K" comes this year, and next year Skylake will finish off what's left of AMD's "big core".

Cherry Trail/Broxton will also prove a veritable nightmare for the Beema/Mullins successors ;-)

 

[zlatan]

Carrizo will also get some new features such as graphics pre-emption and QoS. These will be very useful for Windows 9 and DirectX 12.

 

[zlatan]

Now, that is interesting. An integrated FCH for mobile, with an option for an external on the desktop models. I wonder if anyone will make a mainboard just using the integrated ones. Would be a killer HTPC chip. Especially if it has a H.265 decoder built-in.

Dedicated H.265 decoder is not really useful for this kind of performance level. HSA is a very good solution to do this on the iGPU, with the help of the CPU cores. A dedicated block won't be that robust and won't use much less power.

Telestream will release a videoplayer with H.265 support this year, specially for HSA. It will work with Kaveri as well.

 

[jpiniero]

I have no idea how they are going to fit all of this when they are still at 28 nm.

 

[monstercameron]

I have no idea how they are going to fit all of this when they are still at 28 nm.

http://www.tomshardware.com/news/Steamroller-High_Density_Libraries-hot-chips-cpu-gpu,17218.html

 

[Insert_Nickname]

Dedicated H.265 decoder is not really useful for this kind of performance level. HSA is a very good solution to do this on the iGPU, with the help of the CPU cores. A dedicated block won't be that robust and won't use much less power.

If they can squeeze enough performance out of it. Last I heard pure software H.265 decoding would require 3770-level performance. The IGP can help, but how much?

In fact I'd say the opposite is true for dedicated HW vs. SW decoder. Dedicated HW decoders almost always use less power then SW-based decoders. H.265 is not much more then an extension to H.264, so it not really that much more complex, but requires a lot more processing power.

 

[zlatan]

If they can squeeze enough performance out of it. Last I heard pure software H.265 decoding would require 3770-level performance. The IGP can help, but how much?

An ARM Mali-T604 can decode a Full HD H.265 video in OpenCL without any problem. So it is very possible, that a Kaveri can do it with HSA. Last time I heard that the A8-7600 can decode a 4K H.265 video at 60Hz without stuttering, so I think the iGPU is definitely the best way to do this task.

 

[Phynaz]

So if they are changing from PCIe 2 to 3, I'm assuming this breaks compatibility with current boards?

 

[Vesku]

So if they are changing from PCIe 2 to 3, I'm assuming this breaks compatibility with current boards?

Shouldn't be that difficult to have the UEFI/Microcode run the slots on FM2+ motherboards at the slower speed. Don't expect to drop one in a pre-Carrizo motherboards without running a UEFI update, though.

 

[el etro]

So if they are changing from PCIe 2 to 3, I'm assuming this breaks compatibility with current boards?

Kaveri boards is PCi-E 3.0 compilant.

and next year Skylake will finish off what's left of AMD's "big core"

I doubt.

Cherry Trail/Broxton will also prove a veritable nightmare for the Beema/Mullins successors ;-)

Puma leaks are already pointing a silvertrail killer....

 

[Sweepr]

Puma leaks are already pointing a silvertrail killer....

We've already heard this story. You should wait till this new PowerPoint presentation champion chip gets meaningful (if any) design wins, cause Bay Trail-T powers lots of different tablets/convertibles right now and 14nm Cherry Trail-T comes in November with huge focus on graphics performance improvements (followed by next-gen Willow Trail/Broxton half a year later).

 

[el etro]

There is a AT article pointing it(edit: i found it). It shows same IPC for the Puma Cores, but higher clocks and less power consumption.




Maxwell effect on CPUs.

 

[NostaSeronx]

"Preliminary BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 15h Models 60h-6Fh Processors“

Skipped;
20h-2Fh

Skipping;
40h-4Fh
50h-5Fh

30h-3Fh is only for one generation which is nice.

 

[Bateluer]

There is a AT article pointing it(edit: i found it). It shows same IPC for the Puma Cores, but higher clocks and less power consumption.




Maxwell effect on CPUs.

Do you have the URL for that AT article handy?

I have a subnotebook with an A6 1450 APU in it, and that thing is a dog sometimes.

 

[georgec84]

Thanks for the heads up.

 

[beginner99]

Now, that is interesting. An integrated FCH for mobile, with an option for an external on the desktop models. I wonder if anyone will make a mainboard just using the integrated ones. Would be a killer HTPC chip. Especially if it has a H.265 decoder built-in.

Also it's about time the general purpose PCIe lanes are made 3.0 compliant...

Why don't they use 4 Sata ports in the integrated FCH? Then that would be usable for most motherboards and make them cheaper. More advanced MBs could then add additional controllers. I really don't get it. How needs 8 USB ports? 4 Sata and 4 USB 2.0 would IMHO be much more sane.

 

[norseamd]

this is good

are they going to give multi tdp chips that one could run up to 105 watts if they wanted to?

 

[ViRGE]

The memory controller of Carrizo will feature support for both DDR3 and DDR4 memory technologies.
[...]
On desktops Carrizo will drop into the known FM2+ socket and the integrated FCH will be disabled and the external FCH of the board used. This is an understandable tradeoff to avoid changing the motherboard infrastructure again.

Is it me or are those two facts at odds? DDR4 won't have the same pinout, so unless we're restricting desktops to DDR3, it won't be possible to support DDR4.

 

[coercitiv]

Do you have the URL for that AT article handy?

I have a subnotebook with an A6 1450 APU in it, and that thing is a dog sometimes.

You had the perfect keywords in that pic for a 2 second google search, but there you go.