Sorry, but I don't share your set of assumptions that 14nm costs boatloads to make. Sure, it is being a slower ramp up than 22nm, but the costs of the new node by Intel financial statements are still following Moore's law, e.g., transistors are getting cheaper.
Moore's law is just an observation of IC progress over time it isn't bound to any true physics laws. Intel's statements about how the node does are quite broad , rumour has that they even reduced the complexity of early products to get them to tap out OKish to begin with.
Lower cost per transistor doesn't solve all the problems because you would want to put more transistors in every new product. If the transistor budget doubles the cost/transistor has to become half to keep an equal total cost.
Intel's marketing slides are really vague about this without concrete numbers and only logarithmic scales.
Let's try to work with Intel's slides anyway and assume best case scenario for Intel:
It's hard to read but when I interpret this log scale I come to:
Intel's 22nm node costs 0.15
unit of currency/transistor
Intel's 14nm node costs 0.09
unit of currency/transistor
This would make the 14nm node for double the transistor budget 0.15/0.09 = ~1.67x more expensive. This is with absolute best scenario numbers it means that Intel could according to their marketing save money if they were to use the same number of transistors. (those claims are probably not true TSMC has more money poured and they know very well how things work)
Going by Intel's other picture in that slide which is
unit of currency/surface area:
For a die of the same size there will be a cost increase. Also note how the line even on that logaritmic scale is much steeper than previous nodes.
The steeper line -> higher slope coefficient on a log scale means that the cost per mm^2 has increased dramatically. Even on a normal scale a higher slope coefficient would indicate bigger over generation gains (in cost) but on a log scale this means it's a huge deal.
And I don't know where to start regarding the rest of your assumptions. GLF 28nm isn't not even close to Intel 14nm, maybe close to Intel 22nm but with much more inferior electrical properties.
You can't possibly be serious.
Here we go density wise:
ISSCC Tips Hot Circuit Designs
AMD Kaveri GF 28nm SHP 2.41B 245 mm2 9.837M
AMD Richland GF 32nm SOI 1.30B 246 mm2 5.285M
AMD Llano GF 32nm SOI 1.178B 228 mm2 5.166M
AMD Carrizo GF 28nm
SHP? 3.1B 245mm^2 -> 12.6M/mm^2
Intel Core Sandy Bridge quad core Intel 32nm 1B 216mm^2 -> 4.6M/mm^2
Intel Core Ivy Bridge quad core Intel 22nm 1.4B 160mm^2 -> 8.8M/mm^2
Intel Core Haswell quad core GT2 Intel 22nm 1.4B 177mm^2 -> 7.9 M/mm^2
Intel's Core M Broadwell Intel "14"nm 1.3B 82mm^2 -> 15.8M/mm^2
Intel density is super duper low compared to competition up until 14nm hit but even there it is struggling as it comes out
only slightly ahead of a node that is 2 full node shrinks behind.
Intel's nodes have superior electrical characteristics according to Intel versus the competition. Which is at least partly true yet still from time to time a node that is 2 shrinks behind matches Intel's efficiency. (ARM, MIPS companies and AMD have all produced similair and sometimes better efficiency designs despite the node disadvantage they faced)
Let's wait until Q214 to see what AMD will be forecasting to Carrizo.
Waiting for actual numbers is never a bad idea.