I Don't see AMD doing an HBM apu without doing a different apu layout. The reason that the iGPU in RR is as small as it is, is because it had a hard limit on available memory bandwidth. If you quadrupled the resources in the iGPU without BBM, you'd see very little performance benefit. The same goes with keeping the GPU small and adding HBM. Adding HBM to RR would be a colossal waste of resources for little gain in most cases. Expanding the iGPU in RR to make HBM make sense would make a part that is too space inefficient for the bottom half of the market.
The above reasoning us why I eventually see AMD doing up to 4 different dies at 7nm.
1: 4 CCX, no GCX for Epyc and TR and certain HEDT products.
2: 3 CCX and 1 GCX for desktop HEDT, Epyc and TR products with a "media booster"
3: 2 CCX with 2 GCX for high and mid tier APUs for desktops and laptops
4: half sized 1 CCX with 1 GCX for low power, tablets and thin and light laptops.
I propose this because at that point, AMD will have enough revenue to handle the development of 4 different dies for production at that node. They will be better positioned for their target markets all around. The enabling tech for all of this will be faster memory, such as official support for DDR4 3200 and lpddr 2800 and improved memory efficiency for VEGA as well as the smaller node. The die that I see as least probable is the three CCX, one GCX one as it has the least compelling use case of all of them.