AMD on track for launch of Kaveri in February 2014

[Homeles]

Nice personal attack there btw.

So it's fine for you to label me as arrogant, but it's not okay for me to point out how you are objectively failing to read my post correctly.

 

[inf64]

Ninja edit too hide personal attack now? I should have quoted you, damn my fail.

 

[Homeles]

Please explain why it's okay for you to insult me, and not vice versa.

I also haven't used any personal attacks. Telling you that you're lost and are having difficulty understanding what I've written, when you clearly are misinterpreting my post, isn't an insult. I'm simply pointing out that you're wrong.

 

[NTMBK]

"It took them an extra year to actually make some progress"
I never said it was the answer, however it would have certainly been a better solution than Zambezi was. The fact that they didn't go with Bulldozer cores in Llano only reinforces my point.

Zambezi launched in October 2011, Trinity launched in May 2012- so not quite a year. And Llano came out in June 2011, almost six months before any Bulldozer parts had launched. Arguing that they must have thought BD was a failure because they didn't use Bulldozer in a part that came out before Bulldozer isn't exactly logical! And instead of performing minor tweaks on the 32nm Stars APU that they already had, they chose to go with a tweaked Bulldozer instead (a much more expensive and complex redesign, compared to just iterating on Llano). If AMD had any belief that Stars was superior to Bulldozer, they wouldn't have ditched their working 32nm Stars core.

 

[inf64]

No I haven't insulted you at all. You seem to laugh at AMD's product, telling us all what they should have they done instead and how much they failed. I just asked you why you think you know better than one thousand engineers working on trinity?

Your response is that I'm lost and then you add some more "text" in there to mask it as if you wanted to say more. Please I have seen you doing this type of stuff countless of times and nothing has been done. Maybe not done on this forum, on other forums I'm sure your attitude and way how you post would make you register another account many times now.

 

[inf64]

Getting us back on topic of Kaveri (from an expected derail to what should have been done ~2-4 years back), Olivon @ XS found an article on VR zone about Kaveri ES.

http://vr-zone.com/articles/heres-look-kaveri-apu-engineering-sample/62565.html

Looks like a 3.5Ghz base clock part, probably future top A10 model. Turbo is unknown but my guess is ~3.8-4Ghz is possible for x86 cores and +~100Mhz on iGPU(I assume they didn't go below 800Mhz base clock for iGPU part).

 

[Vesku]

CMT is actually the thing AMD did alright with. It was the lack of IPC gains going from Phenom II/Llano core to original Zambezi core combined with the idea that loading modules first for the boost clocks was better than spreading the threads out to avoid the CMT penalty until it was absolutely necessary, that made the initial Bulldozer a lemon of a launch product. Not sure how much that second part was actually "we think this works best" rather than "we have no clout with Microsoft to get them to patch Windows so we will have to see what they are willing to do".

Steamroller will most likely be what BD should have been, closer to Nehalem IPC. Question is will the GF 28nm process give them the clock speed and power efficiency to make that a compelling product? Back before BD launched I was saying I'd be interested in an 8 Nehalem IPC CMT cores, because that would be like having a i7-970/980 at reasonable pricing. Funny that 2+ years later AMD might finally be able to provide that kind of product but it's looking unlikely they will actually make it (not even hints at 3+ module Steam Roller SKUs).

 

[Homeles]

Zambezi launched in October 2011, Trinity launched in May 2012- so not quite a year.

It rounds up to a year. Either way, it doesn't detract from my main argument.

And Llano came out in June 2011, almost six months before any Bulldozer parts had launched. Arguing that they must have thought BD was a failure because they didn't use Bulldozer in a part that came out before Bulldozer isn't exactly logical!

That's not what I was saying there, either.

And instead of performing minor tweaks on the 32nm Stars APU that they already had, they chose to go with a tweaked Bulldozer instead (a much more expensive and complex redesign, compared to just iterating on Llano). If AMD had any belief that Stars was superior to Bulldozer, they wouldn't have ditched their working 32nm Stars core.

Adapting Stars for competitive mobile usage would have taken substantial rework.

The point I was making was that the Bulldozer architecture wasn't ready for prime time when it debuted. I don't see why that's such a controversial view to hold.

Instead of releasing Zambezi and Interlagos, AMD would have been better off porting Thuban to 32nm and holding out until Piledriver was ready. Doing so would have been considerably less expensive for them, seeing as a 32nm 6 core Thuban would have performed similarly to Zambezi, while being a significantly smaller die.

Piledriver was just a band-aid, though -- a damn good band-aid, but there simply was still a lot that needed to be fixed that couldn't have been in such a short period of time. The foundation was and is still cracked. I'm sure that they could have stuck with the 64KB I-cache and single 4-way decode and managed to make things work. However, for a little extra die penalty, they could substantially increase multithreaded performance, which leaves us with Steamroller.

No I haven't insulted you at all. You seem to laugh at AMD's product, telling us all what they should have they done instead and how much they failed. I just asked you why you think you know better than one thousand engineers working on trinity?

You still think this is about Trinity...

Your response is that I'm lost and then you add some more "text" in there to mask it as if you wanted to say more. Please I have seen you doing this type of stuff countless of times and nothing has been done. Maybe not done on this forum, on other forums I'm sure your attitude and way how you post would make you register another account many times now.

Okay. :thumbsup:

CMT is actually the thing AMD did alright with.

If you think I have believe otherwise, you too are misunderstanding what I'm saying.

It was the lack of IPC gains going from Phenom II/Llano core to original Zambezi core combined with the idea that loading modules first for the boost clocks was better than spreading the threads out to avoid the CMT penalty until it was absolutely necessary, that made the initial Bulldozer a lemon of a launch product. Not sure how much that second part was actually "we think this works best" rather than "we have no clout with Microsoft to get them to patch Windows so we will have to see what they are willing to do".

I don't remember the Windows patch amounting to much. Anyway, the lack of IPC was largely due to substantial bottlenecks in the pipeline. Piledriver fixed some of that, but Steamroller will bring much more in that regard.

Steamroller will most likely be what BD should have been, closer to Nehalem IPC. Question is will the GF 28nm process give them the clock speed and power efficiency to make that a compelling product? Back before BD launched I was saying I'd be interested in an 8 Nehalem IPC CMT cores, because that would be like having a i7-970/980 at reasonable pricing. Funny that 2+ years later AMD might finally be able to provide that kind of product but it's looking unlikely they will actually make it (not even hints at 3+ module Steam Roller SKUs).

I'm hoping that we get greater understanding of the 28nm process at IEDM this year.

 

[Vesku]

Getting us back on topic of Kaveri (from an expected derail to what should have been done ~2-4 years back), Olivon @ XS found an article on VR zone about event AMD plans for Kaveri on 11th of Nov.



Looks like a 3.5Ghz base clock part, probably future top A10 model. Turbo is unknown but my guess is ~3.8-4Ghz is possible for x86 cores and +~100Mhz on iGPU(I assume they didn't go below 800Mhz base clock for iGPU part).

I couldn't find where VR-Zone or the Xtreme forum talked about clockspeed.

 

[inf64]

They haven't. It's been discussed on SA forum. The code of the ES is the hint for the frequency. It might be wrong though, it's just a guess based on the ES code. MAybe it has nothing to do with clock speed or it's just Turbo clock. But in order to outperform Richland, Kaveri needs to clock just about in ~3.5Ghz range for base and in 3.8-3.9Ghz range for Turbo.

 

[NTMBK]

Getting us back on topic of Kaveri (from an expected derail to what should have been done ~2-4 years back), Olivon @ XS found an article on VR zone about Kaveri ES.



Looks like a 3.5Ghz base clock part, probably future top A10 model. Turbo is unknown but my guess is ~3.8-4Ghz is possible for x86 cores and +~100Mhz on iGPU(I assume they didn't go below 800Mhz base clock for iGPU part).

That's definitely a Kaveri- the pinout is for FM2+, not FM2. Good find!

 

[NTMBK]

The point I was making was that the Bulldozer architecture wasn't ready for prime time when it debuted. I don't see why that's such a controversial view to hold.

Instead of releasing Zambezi and Interlagos, AMD would have been better off porting Thuban to 32nm and holding out until Piledriver was ready. Doing so would have been considerably less expensive for them, seeing as a 32nm 6 core Thuban would have performed similarly to Zambezi, while being a significantly smaller die.

It's a hard one to call whether a 32nm Thuban would have outperformed Zambezi. In general Zambezi outperformed 45nm Thuban: http://www.anandtech.com/bench/product/434?vs=203 But there are obviously several performance regressions. Given the experience from Llano, I doubt that 32nm shrink of Thuban would have given any real performance improvements- a TDP drop, perhaps, but certainly no clock gains.

The thing is, if AMD had done that, they would have been a much worse place long term. Sinking those resources into the first Bulldozer meant that they finally got real silicon out, where they could finally try out this brand new architecture in real world situations, release it into the wild to see how it performed. Bulldozer had lived on paper and in simulators for years- remember, they already canned one version of Bulldozer so that they could work on it for a while longer. But within less than a year of actually shipping a Bulldozer product, they had tweaked it enough to make serious performance improvements in Piledriver. I strongly suspect that it was the real world data from actually having production silicon that let them make those changes and get to the better state with Piledriver. Zambezi was a necessary stepping stone. The Stars core was at a dead end, and they needed to make the jump and come up with something new- if they had not built Zambezi and instead made a 32nm Thuban, then I suspect that their next chip would have been Zambezi, not Vishera, and they would still have that learning curve to climb with the new uArch.

 

[Homeles]

It's a hard one to call whether a 32nm Thuban would have outperformed Zambezi. In general Zambezi outperformed 45nm Thuban: http://www.anandtech.com/bench/product/434?vs=203 But there are obviously several performance regressions. Given the experience from Llano, I doubt that 32nm shrink of Thuban would have given any real performance improvements- a TDP drop, perhaps, but certainly no clock gains.

My point there wasn't about out-performance; it was about treading water with Zambezi, while costing significantly less. And yes, clock speeds would have been similar -- 45nm PDSOI barely improved over 32nm PDSOI, with the latter's single noticeable benefit being the improved density. Of course, density is still a big deal.

The thing is, if AMD had done that, they would have been a much worse place long term. Sinking those resources into the first Bulldozer meant that they finally got real silicon out, where they could finally try out this brand new architecture in real world situations, release it into the wild to see how it performed.

One would hope that AMD had the resources to evaluate real world performance internally.

Bulldozer had lived on paper and in simulators for years- remember, they already canned one version of Bulldozer so that they could work on it for a while longer. But within less than a year of actually shipping a Bulldozer product, they had tweaked it enough to make serious performance improvements in Piledriver. I strongly suspect that it was the real world data from actually having production silicon that let them make those changes and get to the better state with Piledriver. Zambezi was a necessary stepping stone.

I really do not believe that they would have needed to put the product on the market in order to have evaluated its performance and discover its flaws.

The Stars core was at a dead end, and they needed to make the jump and come up with something new- if they had not built Zambezi and instead made a 32nm Thuban, then I suspect that their next chip would have been Zambezi, not Vishera, and they would still have that learning curve to climb with the new uArch.

Yes, Stars was certainly a dead end. I still don't quite understand why you believe that a product cannot be thoroughly dissected internally.

 

[NTMBK]

I still don't quite understand why you believe that a product cannot be thoroughly dissected internally.

I may well be wrong; I'm obviously not an electrical engineer, and don't know how AMD and Intel really do business! But it just seems that Bulldozer a remarkably high number of "easy fixes" that let Piledriver outperform it significantly. If AMD could have detected these problems just based on simulations, why did they ship BD in such a bad state? I suspect that they needed actual physical silicon to run tests on. In order to make any physical silicon at all, they had to pay the up front costs of making masks and so forth- the marginal cost of shipping the part they had was much lower, so they figured "let's do it".

They could have delayed ramping up production until the Piledriver improvements were ready, but then they would have been stuck selling Thuban for another year or so. (Somewhat similar to what seems to have happened to Kaveri, with the "SteamrollerB" cores and the massive delays.) Or they could have planned to shrink Thuban, but they would be paying the fixed development costs of making both Thuban silicon and Zambezi silicon. They would have ended up with a smaller die, but they would have much higher total fixed costs from having to develop two 32nm CPUs simultaneously to the point where they could actually get silicon back from the fab.

(And don't forget the WSA- AMD has almost no incentive to make smaller dies.)

 

[Fjodor2001]

Getting us back on topic of Kaveri (from an expected derail to what should have been done ~2-4 years back), Olivon @ XS found an article on VR zone about Kaveri ES.


Looks like a 3.5Ghz base clock part, probably future top A10 model. Turbo is unknown but my guess is ~3.8-4Ghz is possible for x86 cores and +~100Mhz on iGPU(I assume they didn't go below 800Mhz base clock for iGPU part).

Interesting! The VR-Zone article says Kaveri will be launched already on 7 January, i.e. CES 2014:

"AMD’s first HSA supporting APU is set to be launched at CES on January 7, with a release to the channel in February. Consumers should be able to get their hands on systems with the chip in them and in stand-alone retail shortly thereafter."

But I guess that only means presenting it? Actual availability is still expected to be in February 2014 as I understand it.

 

[inf64]

AMD will be "presenting" Kaveri next week, Nov 11-14. NDA lift is *supposedly* on Dec 5 so I suppose we should be able to see some official product specs, roadmap and benchmark data at that time.

 

[Fjodor2001]

So what does it in practice mean that they will "launch" Kaveri on January 7 at CES2014?

 

[Vesku]

So what does it in practice mean that they will "launch" Kaveri on January 7 at CES2014?

Reviews? Then show up retail a few weeks later.

 

[ShintaiDK]

So what does it in practice mean that they will "launch" Kaveri on January 7 at CES2014?

Paperlaunch.

 

[Ajay]

AMD will be "presenting" Kaveri next week, Nov 11-14. NDA lift is *supposedly* on Dec 5 so I suppose we should be able to see some official product specs, roadmap and benchmark data at that time.

Odd that they'd lift the NDA if the launch isn't till the first quarter next year. in any case, I look forward to it.

Oh about your sig:

Originally Posted by ShintaiDK View Post
No quadchannel either.[in Kaveri]

Is there a quad channel version of Kaveri?? A server part maybe?

 

[inf64]

IMC in SR supports quad channel as per earlier leaks from SOG for SR.

 

[Ajay]

IMC in SR supports quad channel as per earlier leaks from SOG for SR.

That's cool, now AMD just needs a socket to support quad channel - too bad it isn't an option, maybe SR just doesn't have enough raw performance to justify it yet - hopefully, Excavator will. And hopefully, SR will deliver enough value help AMD stabilize and continue it's transformation.

For AMD's sake, I sure hope Excavator knocks it out of the park, this will be the first CPU designed under Keller's watch, IIRC. I just hope AMD has access to something equivalent to an SHP 20nm process for EX.

 

[schmuckley]

Those things are coming..I'll know something soon;Whether to get a 1366 setup or Fm2+

 

[Ajay]

Those things are coming..I'll know something soon;Whether to get a 1366 setup or Fm2+

1366, that a bit long in the tooth at this point, and not really that cheap for a good chip and motherboard (which are a bit hard to find)**. It's adequate for me for now, but in 2015 I plan on going with Haswell-E (or Skylake, if HW-E out of my reach for some reason).



** If you overclock a lot, otherwise it's much easier.

 

[ShintaiDK]

IMC in SR supports quad channel as per earlier leaks from SOG for SR.

Yes and it supports whatever channels too by that vague definition. FM2+ is dualchannel only and your dreams of quadchannel is non exisisting on the desktop/mobile platform with Kaveri. The leaks was simply pure fantasy as it usually tends to be.