View attachment 70476
Holy Mackerel, density in N31 GCD based on N5 is around 132 MTr/mm2, just about the same as an older gen iPhone SoC, even higher than AD102 on N4.
If this is what AMD is going for in Phoenix, they can fit 18 Billion transistors in less than 140 mm2. ( 6000 series@13.1 Billion XTor and 5000 series@10.7 Billion XTor)
Even a more conservative 120 MTr/mm2 would make an 18 Billion transistor chip come in at 150 mm2.
Not even considering if they might gain additional density from N4 migration too.
Bean counters must be twiddling their thumbs now waiting for the numbers to come in.