I can finally make this thread.
Phoenix is indeed RDNA3. My advice to everyone: treat the old APU rumours as being out of date.
Phoenix is indeed RDNA3. My advice to everyone: treat the old APU rumours as being out of date.
Says 4c so you know it's -redacted-.Looks like PHX won't increase CU count after all.
But very clever concept for Zen 4c in PHX2.
SW in each core sees same amount of L3, just more cores sharing L3 in Zen 4c. Same core, same AVX512, just different clocks.
But 15W seems excessive. AIE and DSP becoming 1st class citizens.
Die sizes gonna be interesting
Says 4c
Its not BS.Says 4c so you know it's -redacted-.
Profanity is not allowed in the technical forums.
Daveybrat
AT Moderator
Not a lot of sense in adding more CUs when all of the other RDNA3 goodness and the extra memory bandwidth will give it enough of a boost.
There were several people speculating about design flaws in RDNA3 limiting clock speeds. It'll be interesting to see if those were caught and fixed before these chips went into production.
I think these will make for a tidy little budget gaming PC that mostly runs e-sport titles or other titles at 1080p medium.
AMD officially called the Bergamo core Zen 4c. So that's not a problem.
What's wrong with saying 4c?
AMD can specify in CPU_ID 8000_0026 seriesHow can AMD do Zen4 & Zen4C within one die since they have different density? A truck load of salt again.
Not all RDNA2 Rembrandt GPU's are 12CU's. Some are 6, like in the 6600U.You are welcome.
PHX2 will have weaker IGP than Rembrandt.
2 WGPs(4CU) RDNA3 vs 6WGPs(12CU) RDNA2
Of course RDNA3 has higher PPC with likely higher clocks, but at best I think It will perform like 6600U IGP If It can clock 30% higher.
I think they should have used 3WGPs instead. This way It could be also used as a more efficient replacement for Steam deck's Aerith SoC.
I would've liked to see 32MB of L3, for power reasons more than anything, seeing as cache size can have a tremendous impact on power efficiency. In some ways 32MB of L3 is more useful on Phoenix U than it is on various Raphael desktop SKU's.L2 is 1 MB. And that will play crucial role in this version of this arch being in performance between Zen 3 and Zen 4, desktop.
Its fine.
As much as I would like to see AMD introduce Big.little already in this generation, so far there has only been one tweet by a person with next to no followers. Not even rumour mills like WCCFT have adapted this so far - so a truckload of salt is needed.Is PHX2 going to be released for mainstream laptops (yes I realize it will cost more, by mainstream I just mean same as the other Pheonix SKU's would be albeit lower cost/perf) or is this almost entirely for Steam Deck/handhelds?
To act as a memory controller for a single CPU, you'd only need CXLmem, which is part of the original spec, so that is perfectly plausible. But saving on pins at the cost of power, bandwidth, and latency is a bad tradeoff for mobile.Here is the solution from AMD that might solve the latency issue of chiplets APU. AMD has SAM (Smart Access Memory) for a year now, aka Resizeable Bar. I don't know it will be implemented on Phoenix Point but it provides me with good thinking out of it: Can PCIe replaces integrated memory controller?
PCIe is a serial bus protocol, so it is cost effective and uses less pin counts. With each new version, the bandwidth keep on increasing: PCIe 5.0 x16 can transfer 63GB/s which is still less than dual-channel LPDDR5-6400 @ 100GB/s. PCIe 6.0 x16 which has been introduced in 2022 doubles up to 121 GB/s finally has enough bandwidth. In fact CXL 3.0 (essential PCIe for DC) has CXL.mem protocol acting like memory extension.
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Mendocino is the current gen part for fanless designs afaik, and that'll have it's own successor.Regarding these rumored specs, obviously an unknown leaker should be taken with plenty of skepticism, but this sort of split would make a lot of sense. If nothing else, it would be very beneficial for AMD to add a cost-reduced part for the mainstream market. Your typical office or home PC user wouldn't really see a benefit from 8 big cores or a class-leading GPU, but they would benefit from better battery life and lower power envelopes enabled by big.LITTLE/hybrid/whatever you want to call it, and of course the cost savings of such an arrangement. Then they still have the beefed up config for light gaming, content creation, etc. Real or not, sounds like a great set of configs.
The only part that confuses me is that neither goes below 15W. I'm not sure why PHX2 wouldn't be able to scale down to ~10W, and that would let them fit it in fanless laptops. That's a pretty significant gap in AMD's lineup right now, but they should have everything they need to fill it.
Not all RDNA2 Rembrandt GPU's are 12CU's. Some are 6, like in the 6600U.
So how does Little Phoenix, or PHX2 with 2 RDNA3 WGP's (4CU's) fare against that? I would presume better and still more efficient.
You meant 6 and 12 CU configurations.I hope they more dynamically bin the iGPU. Rysen 6000 only cones with the option for 6 or 8 CUs.
I want to see iGPU configs like 4,6,8,12.
I also wonder who he is supposed to be If Glo. said He is. Is he from some well known forum?As much as I would like to see AMD introduce Big.little already in this generation, so far there has only been one tweet by a person with next to no followers. Not even rumour mills like WCCFT have adapted this so far - so a truckload of salt is needed.