AMD Raven Ridge 'Zen APU' Thread

[cbn]

I'd be very interested in seeing what they do with 1-CCX parts. We know they can disable one core per CCX as seen with the R5-16xx series. So if Ravenridge is going to be based on 1-CCX dice, I can see something like:

FX-1800X - 4C/8T @ 2.8 base/3.2 turbo, 12x Vega CU, 45W
FX-1800 - 4C/8T @ 2.2 base/3.0 turbo, 12x Vega CU, 35W
A12-1700X - 4C/8T@ 2.6 base/3.0 turbo, 10x Vega CU, 45W
A12-1700 - 4C/8T @ 2.2 base/2.8 turbo, 10x Vega CU, 35W
A10-1600X - 3C/6T @ 2.6 base/3.0 turbo, 10x Vega CU, 45W
A10-1600 - 3C/6T @ 2.2 base/2.8 turbo, 10x Vega CU, 35W
A8-1500X - 2C/4T @ 2.8 base/3.2 turbo, 8x Vega CU, 45W
A8-1500 - 2C/4T @ 2.4 base/3.0 turbo, 8x Vega CU, 35W
A6-1400 - 2C/4T @ 2.2 base/2.8 turbo, 8x Vega CU, 25W
A4-1300 - 2C/4T @ 1.8 base/2.4 turbo, 8x Vega CU, 25W

(In the event that anyone from AMD is reading this and it by coincidence turns out to be your upcoming product stack, no I didn't hack you or anything; this is pure guesswork).

I also wonder if AMD can MCM two Raven Ridge dies (with defect in iGPU) to make either a quad channel 8C/16T or quad channel 6C/12T for the rumored X390 platform. (X390 is rumored to to use two Zeppelin 8C/16T dies.....but using two Raven ridge would allow AMD is make a lower core count quad channel chip. This rather than two Athlon type chips for AM4)

 

[Glo.]

There is interesting information I got from Retail line rumors.

Raven Ridge 4C/8T+11 CU designs are APUs.

But there is something called NPU. And it also is combination of CPU and GPU on single package.

Make out from this whatever you want.

 

[otinane]

Isn't that coming from the:GCN CU & GCN NCU separation ?

Seems my guessing (and only) about Zen + Polaris & Zen + Vega APU, could be correct.

 

[Glo.]

All of Raven Ridge designs are using Vega architecture. There is no Zen+Polaris design, unless someone will order semi-custom design, and pay for it.

I have no idea what is NPU. None of my sources knows what it is. But what is apparent is the distinction between APU and NPU. I guess we will have to wait and see what will happen.

 

[jpiniero]

Hasn't AMD historically put the APU on the prev gen architecture? It does sort of make sense, because they are working on finishing the APU design and the GPU design at the same time.

The NPU sounds like Kaby Lake-G.

 

[Glo.]

Hasn't AMD historically put the APU on the prev gen architecture? It does sort of make sense, because they are working on finishing the APU design and the GPU design at the same time.

The NPU sounds like Kaby Lake-G.

NPU's are for AM4 platform. Nobody so far has heard anything about server sockets, in this context.

 

[sm625]

I also wonder if AMD can MCM two Raven Ridge dies (with defect in iGPU) to make either a quad channel 8C/16T or quad channel 6C/12T for the rumored X390 platform. (X390 is rumored to to use two Zeppelin 8C/16T dies.....but using two Raven ridge would allow AMD is make a lower core count quad channel chip. This rather than two Athlon type chips for AM4)

I was wondering if they could MCM two dies and not disable the GPUs. Would AMD be competent enough to gang these two GPUs together to get double the performance, with none of the current drawbacks of crossfire?

 

[jpiniero]

NPU's are for AM4 platform.

AM4? Really? I wouldn't be surprised if there was a Summit Ridge equivalent to Kaby-G, but fitting all that in AM4 would be tough I would think.

 

[Glo.]

AM4? Really? I wouldn't be surprised if there was a Summit Ridge equivalent to Kaby-G, but fitting all that in AM4 would be tough I would think.

Yes, AM4. That is the only thing that retail line rumors are telling about this.

The odd thing is this. Right now we know about 3 things that are supposedly combining CPU+GPU tech that will be available for AM4:
Bristol Ridge APU, Raven Ridge APU, NPU. Whatever it is called. It can only be new moniker for something special from AMD.

 

[soresu]

If I had to make a guess about NPU as a moniker, it would be Neural Processing Unit. Or something along those lines considering they have already showed a clear partiality to the tech with their SenseMI feature.

 

[Yeroon]

Hasn't AMD historically put the APU on the prev gen architecture? It does sort of make sense, because they are working on finishing the APU design and the GPU design at the same time.

The NPU sounds like Kaby Lake-G.

Initially, yes. However, by the time they got to Carrizo they were on the current version of GCN (GCN3).
Slides say RR is Vega.
AMD is putting a lot of engineering focus on APUs as of late, and with plans of a server APU, why hinder it with older GCN?
Vega has probably been ironed out for a while now - (speculation) - I believe the biggest hold-up has been volume of HBM2 chips for a GPU release, so while Vega isnt roaming the public, there is no reason for AMD to avoid its architecture internally.

 

[Jan Olšan]

Couldn't it be something as simple as a name for APUs with deactivated iGPU?
(They might not like the name "CPU" because even without graphics core, the chip is still more akin to SoC than to conventional CPU. Or maybe they want to make a distinction between these lower-tier deactivated chips and straight Ryzens that are called CPU).

 

[Glo.]

If I had to make a guess about NPU as a moniker, it would be Neural Processing Unit. Or something along those lines considering they have already showed a clear partiality to the tech with their SenseMI feature.

If it slated for Neural Nets then it has to have HBM2 on package for latency and bandwidth.

You can be absolutely correct on this topic.

 

[otinane]

NPU stands for Next Processing Unit (as NCU). The reason mainly comes from a marketing point of view, since APU is synonymous of entry segment (up to A12-9800). Now if that also signals a hardware advancement as well (HBM2, Vega iGPU cores etc) placing NPU to mainstream segment, is something yet to be seen.

Another thought on this could be, that they want to separate server APU from cosnumer, calling them NPU and adding the costly HBM2.

 

[Glo.]

NPU stands for Next Processing Unit (as NCU). The reason mainly comes from a marketing point of view, since APU is synonymous of entry segment (up to A12-9800). Now if that also signals a hardware advancement as well (HBM2, Vega iGPU cores etc) placing NPU to mainstream segment, is something yet to be seen.

Another thought on this could be, that they want to separate server APU from cosnumer, calling them NPU and adding the costly HBM2.

This is very possible.

 

[misuspita]

So, they could think of naming regular DDR4, no HBM2 as APU, and NPU would be reserved for the more expensive HBM2 variants?

 

[Glo.]

So, they could think of naming regular DDR4, no HBM2 as APU, and NPU would be reserved for the more expensive HBM2 variants?

It is one of possibilities.

Key points from my post again: Retail line suggests that APU and NPU are different things.

Raven Ridge is APU with Zen+Vega. About NPU is known only name: NPU. Nothing more. Everything what has been posted here is just our speculation what can actually NPU be.

 

[LightningZ71]

Checking some of the other forums and motherboard company websites seems to indicate that the "NPU" device is Athlon branded as opposed to APU branded. Given that the mob makers are indicating that NPU devices are only able to support an x8 PCIE slot (wired, x16 physical), it seems to indicate that these are APUS that have either disabled or repurposed iGPUs. I can speculate that these are recovered APU parts that have failed iGPUs and are being sold at low prices to recover sunk cost.

In the APU space and at the low end, the lack of an external x16 full speed PCIE slot is not going to matter. These can be sold as budget game machines and low end CAD machines where the iGPUs wouldn't be used, but where maximum graphics performance isn't needed. It makes sense to recover those parts in this market, especially if you offer an rx550 and 560 that will likely be better performers than the iGPUs anyway and will not loose performance with a half rate PCIE slot.

 

[Shivansps]

I still fail to see the point of pairing a super slow 11CU GPU with HBM2, and adding 1 CCX to the mix to make a super expensive thing that will be outperformed by a $400(or less) cpu+gpu combination on the market. And im not talking about games here.

And adding more CU will just make things worse, (cost).

 

[LightningZ71]

Remember, it doesn't have to be as fast as a discreet solution. It just has to be faster than the competing Intel solution. I suspect that they are aiming for better than Intel's best IRIS implementation.

 

[Glo.]

It genuinely depends on the performance of the iGPU.

If 16CU+HBM2 design is able to bring higher than GTX 1050 Ti level of performance, then it makes sense. VERY MUCH makes sense.

 

[KompuKare]

Surely the biggest market of a HBM2 APU would be laptops. If they can make a laptop which only uses one chip but outperforms Intel + 1050M for a lower BOM or TPU then it would be an interesting product.

 

[Crumpet]

"Ryzen 3, Ryzen mobile APUs (Raven Ridge) are in H2."

AMD financial call for Q1

 

[Insert_Nickname]

"Ryzen 3, Ryzen mobile APUs (Raven Ridge) are in H2."

So they may be using the RR die for Ryzen 3? Sounds plausible.

 

[Crumpet]

So they may be using the RR die for Ryzen 3? Sounds plausible.

That would indeed make sense, was what i'd assumed from that remark. R3 and scaled vega gpu should make for a solid APU.