DisEnchantment
Golden Member
- Mar 3, 2017
- 1,687
- 6,243
- 136
I thought AMD had said as much but it's darn near fact that any Zen based CPU will be using Vega. It's one of the biggest points of them developing IF.
2M3001C3T4MF2_33/30_N + AMD 15DD
2M2000C4T4MF2_33/20_N + AMD 15DD
2M1901C4T4MF2_30/19_N + AMD 15DD
All the 15DD are Raven IDs. Checking the sources it is pretty clear Vega and Raven use GFX9.
I checked out out the agd5f repo, now browsing the branch drm-next-4.13-wip
Some Info from the sources as of this commit 9aafbfcdead1f9f7d6eaade6f87c86b7069815a2
- Max VRAM width is 2048, read from register ranges 128 bit to 2048 bit. From the code it seems some chips will have HBM widths from 128, 256, 512, 1024, 2048. Some chips apparently have no HBM?
- There are bin files/microcode which are loaded into the asic everytime when driver is loaded?
- Vega and Raven belongs to new chip family unlike Polaris which belong to a big family of chips (Tonga, Fiji, Polaris10/11)
- Vega has many new ip blocks,
- Raven has integrated audio it seems.
- Raven is having many similar ip blocks, including the memory controller for gfx9, but it lacks uvd and vce has vcn instead
- It seems that vcn has both encode and decode blocks, I am not sure but seems so.
amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block);
amdgpu_ip_block_add(adev, &vce_v4_0_ip_block);
Raven has vcn instead, which according to phoronix is doing similar job.
amdgpu_ip_block_add(adev, &vcn_v1_0_ip_block);
Last edited: