I saw those in reports from Computex. Wonder how thermals and battery life are. I wouldn't be surprised if they were okay for something stuffing a 65W desktop CPU into a laptop - these Ryzen chips are pretty frugal when it comes to power.OK,this is not the APU but Overclockers UK seem to have started selling the first laptops with a Ryzen CPU in them:
https://www.overclockers.co.uk/asus...amd-ryzen-7-1700-gaming-laptop-lt-24k-as.html
https://www.overclockers.co.uk/asus...amd-ryzen-5-1600-gaming-laptop-lt-24l-as.html
AMD is comparing here top end A12 9800 APU with Eng sample of Raven Ridge APU.
For all we know, 9800 iGPU has 8 CU's, 1108 MHz, 65W TDP and performance level like this:
Eng Sample of Raven Ridge has 3.0/3.3 Clock speeds on CPU, and 800 MHz on GPU that has 11 CU's, and 35W TDP.
Well, if this is correct than we can expect pretty nice boost in performance. 40% bigger GPU, but with 30% lower core clock, is still able to be 40% faster on average? That is pretty nice boost.
Im wondering, what they will be able to achieve with higher TDPs, and faster RAM.
Another leak from Videocardz.com
So the Great Horned Owl soc will also have 11 CU. It seems to be the max for Raven Ridge and for me is somewhat disappointing, since on 28nm they had 8 CU. A Vega CU might be bigger and therefor the reason of why only 11 CU fit. Also the way AMD set up the CCX and uses a more modular approach, might have a small impact. I was hoping for at least 12 CU and hopefully 14-16 CU.First of all, I want to say thank you to moderator after clearing my mistake.
Here's quick recap.
Another leak from Videocardz.com
I also want to address some discussion from my previous closed thread.
1. Those pictures above show the "Engineering Sample" roadmap and not the final product timeline, hence some oddness in it.
2. The pictures was shown to Enterprise clients, hence ECC memory support.
2. Regarding the missing HBM2 feature in Raven Ridge, I assume their prediction about HBM2 yield and cost was way-off from the reality. That's why we'll see limited number of APU will use HBM2 (Apple product will be prioritised because I think they can offer higher price to Apple users). And also, AFAIK, the first iteration of mobile Raven Ridge will be developed in 14 LPP node instead of the improved GloFo 14+.
3. I also have a good interest in Banded Kestrel APU because Banded Kestrel not only will become the successor of Puma+ based Carrizo-L "small" APU (as a fan of cat cores, I don't recognize the existence of Stoney Ridge-APU) but also will become the successor to Kabini APU (FM1 everybody?).
4. I don't have any data about how Banded Kestrel will be developed, but I believe they will still use CCX concept with some alteration and that "mini CCX" concept maybe appropriate in this case.
So the Great Horned Owl soc will also have 11 CU. It seems to be the max for Raven Ridge and for me is somewhat disappointing, since on 28nm they had 8 CU. A Vega CU might be bigger and therefor the reason of why only 11 CU fit. Also the way AMD set up the CCX and uses a more modular approach, might have a small impact. I was hoping for at least 12 CU and hopefully 14-16 CU.
I am planning a APU build when Rave Ridge releases, so I'm eager for more leaks...
I think because it's intended to AMD's existing and potential enterprise clients. That's why they also show their previous products to remind their clients and also to show how much they already have progressed.@ ao_ika_red:
To Quote Myself from the other closed thread of yours:
"The trouble I have with your road map "leak" is ; why would they start at 2015 ? A road map - i.e. what coming down the road , would start with 2017 if it's a new leak , Right ?
It seems it would have been produced late '14 - early '15 if it starts at 2015."
Comments ?
... I think because it's intended to AMD's existing and potential enterprise clients. That's why they also show their previous products to remind their clients and also to show how much they already have progressed.
So the Great Horned Owl soc will also have 11 CU. It seems to be the max for Raven Ridge and for me is somewhat disappointing, since on 28nm they had 8 CU. A Vega CU might be bigger and therefor the reason of why only 11 CU fit. Also the way AMD set up the CCX and uses a more modular approach, might have a small impact. I was hoping for at least 12 CU and hopefully 14-16 CU.
I am planning a APU build when Rave Ridge releases, so I'm eager for more leaks...
So they have not announced HBM2 parts, that is why none of roadmaps currently is showing 12 CU design.Tech_TTT: Are we expecting an AMD APU with onboard HBM2 Memory as shared memory for both System and GPU and no DIMMs slots any time sooner? What are your plans for very low voltage CPU? The Ryzen managed a good 65W TDP for 8 cores. Can we expect a 15W 4 core Ryzen APU to compete with a low voltage Intel CPU?
DON WOLIGROSKI: We're definitely considering different HBM implementations, but we haven't announced anything I can talk to. In a lot of ways the Zen architecture gets more impressive as you provide less power. I can't comment on unannounced laptop parts, but there are great things coming!
Unfortunately, there's only mobile Zen APU in 2017, nothing offered to desktop market until early next year. That's also the reason why I don't offer Ryzen to my family and friends. They need a cost-effective APU, not a separate CPU and GPU that will hurt their wallet and also their electrical bill.That works for Me
I think they should have come out with a low end Ryzen APU right from the start. All the $90 to $250 Mobos came out with video outputs that are useless till there is an APU that uses them. You'll need a discreet GPU , which has it's own video outputs , till they do.
There's a lot of things they could/should have done - and they'd have done them had they had the money/R&D to do it all at once. As it is, be glad they got such a good CPU out at all
Those notebook with Ryzen's don't look that tempting: a 65w CPU & a 580? Power draw! I'm quite sure that Ryzen can be downclocked & binned to make a really, really good mobile CPU though. Presumably something else that AMD haven't had the time to organise yet. They're advertising the 1700 as the same clocks as the desktop one.
(This surely must be something they're working on? Great margins.).
I even surprised once these R7 1700 x RX580 combo emerged in enthusiast-level laptop. It's not only a big power draw in such confined space, but also a thermal headache. I think it's more like a Bugatti Veyron thing, a "technical exercise" to show how flexible Zen core is. If only they pair it with much efficient GPU, I think it will gain some traction in enthusiast laptop.
Taking and expanding my post from the closed thread (couldn't they have been merged instead?):
The Zen-based APUs are interesting for two aspects:
- They will obviously not using the Zeppelin die every Zen chip so far build upon. Great Horned Owl seems like a straight forward version of a 1x CCX die with an uncore optimized for power consumption (pretty important as the uncore of the Zeppelin die alone already accounts for ~25W TDP). Banded Kestrel on the other hand is a real wildcard. Obviously it's like half a CCX, but will they design a die specifically for it in addition to the 1x CCX one for Great Horned Owl? Or is it like a "mini-CCX" die and Great Horned Owl uses two of those?
- They should be the first chips using Infinity Fabric for communicating between heterogeneous modules. The combination of CPU and GPU modules is kind of old hat by now, but depending on the flexibility IF is showcasing in these APUs it may pave the way to specialized IF-based MCMs (like including ASICs).
Absolutely agree with that. By doing that, AMD want to show to its opponents what they able to do without them. It's not perfect, but it's respectable as a technical exercise.If laptop OEMs have half a brain they'd pair the R5/R7 Zens with high end pascal (1070/80) laptop versions, I am thinking that the RX 580 is more of a package deal from AMD...
Even though it's listed as an 11 CU design it could physically be 12 CU with binning built in so they have better yields and can disable the least efficient CU to more easily hit TDP targets. Or physically 11 and bin to 10 active.
In the two slides you posted L3 cache size is perfectly in line with the CCXes so far (8MB for 4 cores, 4MB for 2 cores) so actually no change there. We know nothing about the actual dies, what "sacrifice" do you expect?After looking closely at CCX design, I think AMD already prepared this. There will be a sacrifice, though. And I speculate lesser L3 cache than normal CCX already had.
Mobile performance is always constrained by thermal and power requirement. Because Zen is designed as a very power-efficient chip, it's not surprising if they claim a much better power/performance compared to mobile BR parts. That advantage will be very slightly decreased in desktop environment because as we know, first generation of Zen won't clock as high as we hope initially. But, it will be a significant boost for casual users that move from Kaveri (refresh) APU.
AMD is comparing here top end A12 9800 APU with Eng sample of Raven Ridge APU.
The Zen-based APUs are interesting for two aspects:
There's no reason fusing-off working CU because not only it's a waste of die space, but also waste of time and money to fused-off that single CU.
In the two slides you posted L3 cache size is perfectly in line with the CCXes so far (8MB for 4 cores, 4MB for 2 cores) so actually no change there. We know nothing about the actual dies, what "sacrifice" do you expect?
However, Raven Ridge AM4 Desktop may come out on a more improved and mature 14nm LPP than Summit Ridge (Ryzen), so I believe the frequencies we see for RR AM4 will be slightly better than there
This slide deck, just looks like old info. Great Horned Owl is just what eventually became Raven Ridge. Every Leak on Raven Ridge shows 4 Zen Cores and 11 CU GPU, so there is nothing new there.
Kestrel is labeled as a "concept", which implies AMD isn't sure they are even going to bother with that one. It looks like a chip specifically for tablets, when the tablet market isn't so hot anymore.
I have always been more excited about seeing Raven Ridge than either Ryzen or Vega. It is a more important part in the overall market than the current Ryzen Desktop CPUs. Most of the consumer market is running on APU/IGP designs these days, and this could be a very competitive APU. It might even have a shot at winning some Apple contracts...
We just have to wait forever since it is marriage of both Ryzen and Vega, all the issues in both of those have to get worked out first.
Sure there is if you want to have segment product offerings. For example, there are going to be some parts that have a damaged or dysfunctional Zen core, so they may disable (I'm assuming this is done through firmware rather than physically fusing off part of the chip for ease and cost reasons) two total to sell a 2C/4T part. Depending on what they want to target for TDP for such a chip, they may need to disable some of the CUs as well.
* AMD have to differentiate their desktop APU performance with Ryzen 3 / 5 performance and by reducing L3 cache will do it just right.
I doubt that. Why would they? I expect to see 4C/8T, 4C/4T, 2C/4T and 2C/2T SKUs for RR, with perhaps a single 2C/4T SKU that has access to the full 8MB CCX cache. Such a chip could be pretty nifty for ultra mobile usage.
Besides, all of the Ryzen 5 SKUs already have access to the full 16MB Zeppelin cache, only the lowest-end 1400 has 8MB cache. So the 1400 has the same size cache as RR will have, just split between CCXs. Ryzen 3 is distinguished by lack of SMT, apparently not cache size and hierarchy. So I doubt RR will be much different, the CPU portion being identical in design.
I assume, without anything limit its performance, Raven Ridge performance will land between Ryzen 3 and Ryzen 5 with the advantage of igp. And if they have a badly damaged igp, they will sell it as a CPU just like Athlon. It will inadvertently eat Ryzen 3 and maybe also Ryzen 5 sales.