14LPP had 3 options -
https://pc.watch.impress.co.jp/docs/column/kaigai/733713.html
https://pc.watch.impress.co.jp/img/pcw/docs/733/713/html/9.jpg.html
1. High Density (CPP=78nm,9T)
2. High Performance (CPP=84nm, 9T) and
3. Ultra High Performance (CPP=84nm, 10.5T)
AMD chose to go with High density for the first gen Zen die which was shared by client and server.
https://www.pcper.com/news/Processors/AMD-Details-Zen-ISCCC
A CPP of 78nm confirms Zen used High density libraries.
Pinnacle Ridge is a client only die built at 12LP. 12LP is an improved 14LPP node with transistor level enhancements. AMD has the choice to go for UHP libraries which has higher track height and larger CPP . We have to wait and see what AMD has done. But i think AMD might have gone for the max performance as they want to reduce the ST perf lead of Intel KBL and CFL.