Indeed, albeit I saw a single thread of Prime 95 AVX load being schedules to the lowest core for quite some time in one test.
After lots of fiddling, testing, analyzing, measuring and wrapping my head around the whole thing I think that I now understand the mechanics and interoperability of PBO, Curve Optimizer, Vcore (offset), (maximum) frequency limit vs. single-core + multi-core performance.
The only thing that still confuse me are:
- The EDC (215 A) limit permanently hitting 100% during sustained load that is not even close to the TDC limit (210 A) or measured current (130 A).
- Some power read-outs of HWinfo that seem like either HWinfo errors of sensors reporting wrong values, specifically "Package Power" vs. "Core+SoC Power" (20 watts lower than Package Power) vs. PIn/POut (lower than Package Power).
Overall I am not convinced that messing with all these settings is worth over just enabling PBO in BIOS with either the AMD or mainboard preset. Even with CO offsets of -30 and a slight voltage bump (AMD overclock preset) the CB20 sustained multi-core increases only by 3.5 - 5% (average 4.65 - 4.7 Ghz vs. 4.5 Gz). And then you have to do stability tests.
Sustained single-core improvements (of maybe 2-3%) are even harder to achieve, because you have to use negative CO on the "best" cores, which are likely already running closer to the edge to begin with. This is where silicon lottery comes in again, which is what overclocking mostly is about anyway.