AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[lolfail9001]

How about this then:

67-40% = 40.2

Similarly to WinRAR, the FastStone test us updated to the latest version. FastStone is the program I use to perform quick or bulk actions on images, such as resizing, adjusting for color and cropping. In our test we take a series of 170 images in various sizes and formats and convert them all into 640x480 .gif files, maintaining the aspect ratio. FastStone does not use multithreading for this test, and thus single threaded performance is often the winner.

You do understand that removing 40% from time is not "40% better" but 66,7% better?

 

[Glo.]

You do understand that removing 40% from time is not "40% better" but 66,7% better?

No. It depends from which perspective you look at. 26.8 is 40% from 67.

If you compare 40.2 with 67, then yes, it is 66.7%. But not "Better". Its the end result in seconds.

 

[Dresdenboy]

There seems to be a new Engineering Sample OPN:

What I can tell you is, what the new Summit Ridge samples are called: AMD Eng Sample: 1D3201A2M88F3_35/32_N

https://www.reddit.com/r/Amd/comments/5egmiy/what_do_you_think_about_this_zen_leak/dacifw3/

 

[Arachnotronic]

No. It depends from which perspective you look at. 26.8 is 40% from 67.

If you compare 40.2 with 67, then yes, it is 66.7%. But not "Better". Its the end result in seconds.

67-40.2 = 26.8.

It takes AMD 66.7% more time to complete the task; it takes Intel 40% less time to complete the task.

Rate = distance/time.

distance in this case is the task that the cpu needs to complete.

rate_intel =d/time_intel
rate_amd = d/time_amd

rate_intel = d/40.2
rate_amd = d/67

d = 40.2*rate_intel
d = 67*rate_amd

40.2*rate_intel = 67*rate_amd
rate_intel = 67*rate_amd/40.2

rate_intel = 1.667*rate_amd

Intel is 66.7% faster than AMD here.

 

[bjt2]

There seems to be a new ES Sample OPN:

https://www.reddit.com/r/Amd/comments/5egmiy/what_do_you_think_about_this_zen_leak/dacifw3/

3.2 base, 3.5 turbo?

 

[Arachnotronic]

3.2 base, 3.5 turbo?

Looks like it. Certainly better than 2.8GHz base/3.2GHz turbo that previous samples apparently ran at.

 

[deasd]

There seems to be a new ES Sample OPN:

https://www.reddit.com/r/Amd/comments/5egmiy/what_do_you_think_about_this_zen_leak/dacifw3/

http://imgur.com/a/kPYc3
What is this?From original post.

 

[Doom2pro]

True, C is always going to be quicker.

But I didn't have the experience in C or time to learn how to build something from scratch. So python was the answer that provided me the quickest result (including programming time).

My first language, the first language I dove into was C++... Best decision I ever made, diving into the easy stuff early tends to make you more hesitant to use the lower level languages, gets you into mind sets and practices that makes them harder to learn.

Once you know the low level stuff, ASM, C, C++ the other languages are a piece of cake.

 

[cdimauro]

I am a researcher and use Matlab... It integrates nicely with java (it includes the oracle JVM and you can use all java classes in Matlab scripts and functions)... It's very productive...

Time to try Python:
http://python-development.blogspot.com/2016/03/why-do-many-data-scientists-love-using.html
https://www.quora.com/Why-is-Python-a-language-of-choice-for-data-scientists?share=1
http://bellm.org/blog/2011/05/27/why-astronomers-should-program-in-python/
https://www.pycon.it/conference/talks/python-and-dawn-gravitational-wave-astronomy
https://www.pycon.it/conference/talks/python-behind-gravitational-waves-discovery
http://www.slideshare.net/didip/why-i-love-python

For large arrays and datasets, I found python (through its extensions) orders of magnitude quicker than matlab.

At the time, I had a lot of experience in matlab and not much in python - it was a surprising difference.

*

True, C is always going to be quicker.

But I didn't have the experience in C or time to learn how to build something from scratch. So python was the answer that provided me the quickest result (including programming time).

Which is very important.

For image processing, it's very fast. And now i learned how to integrate CUDA... We have a blade with 2 GTX 690... Way faster than the CPU...

Python allows to use CUDA also, plus many other packages which are able to offload heavy operations to the GPUs. Or to multiple cores.

And more news will come in future, believe me (but don't ask, or I've to kill you after. )

Please, take a look at this portal: http://pydata.org

And you're invited to join the upcoming Italian's PyCon at the beginning of April, in Florence, where there's always a specific track with many talks only for "PyData". Or the next Europython, in Rimini, which has similar tracks.

/OT

Yes, because the free ports are two, both can do int and vecint, if i remember well...

No. Only one can do int and vecint+vecshuffle. The other one is "pure int" (and branches).

You may have a slowdown only on code with many FP vecint and int instructions that conflicts...

Sure.

If they are 256 bit, obviously on Zen can't be sustained in one cycle, while on intel yes.

Largely, thanks to the more 256 ports, included load & store ones.

But i can't imagine an actual software with FP and vecint instruction intermixed...

In reality a vecint unit does also some common operations, like moves (there are many different move instructions), conversions, masking, and testing.

 

[Dresdenboy]

3.2 base, 3.5 turbo?

Yep. But taking into account the data posted in this very forum, base could also be 3.15 GHz.

 

[Dresdenboy]

http://imgur.com/a/kPYc3
What is this?From original post.

Looks like some speculation based on the known leaks. I can make tables, too.

 

[sirmo]

My first language, the first language I dove into was C++... Best decision I ever made, diving into the easy stuff early tends to make you more hesitant to use the lower level languages, gets you into mind sets and practices that makes them harder to learn.

Once you know the low level stuff, ASM, C, C++ the other languages are a piece of cake.

I coded ASM in MS debug back in the early 90s before I learned C.

 

[TheELF]

Yep. But taking into account the data posted in this very forum, base could also be 3.15 GHz.

So that would be same levels of performance as a ~4.7Ghz FX right?
~40% from XV which is ~10% from fx,so 50% higher clocks should give you FX.
So it all comes down to if the rumors about liquid nitrogen for anything above ~4.2Ghz come true or not.

 

[The Stilt]

There seems to be a new Engineering Sample OPN:

https://www.reddit.com/r/Amd/comments/5egmiy/what_do_you_think_about_this_zen_leak/dacifw3/

The SKU naming would imply a new (non A0) stepping, which (as far as I know) doesn't exist. AFAIK only the node has been changing, which usually implies they're are fine tuning it and integrating errata workarounds, rather than fixing any major issues or errata requiring hardware changes. Node changes are not visible in the SKU, since the SKU only contains information about the major & minor die revision. Not impossible that such part exists, but I certainly doubt it.

 

[cytg111]

The SKU naming would imply a new (non A0) stepping, which (as far as I know) doesn't exist. AFAIK only the node has been changing, which usually implies they're are fine tuning it and integrating errata workarounds, rather than fixing any major issues or errata requiring hardware changes. Node changes are not visible in the SKU, since the SKU only contains information about the major & minor die revision. Not impossible that such part exists, but I certainly doubt it.

Probability that AMD is deliberately running a misinformation campaign as a way to keep the cards tight to the vest?

 

[inf64]

Dunno if this has been posted before:
https://www.computerbase.de/2016-11/skylake-ep-ex-32-kerne-cpu-xeon/

Bereits auf den Veranstaltungen im Sommer wie IDF 2016 und Hot Chips hatte ComputerBase mehrfach die Information erhalten, dass der Skylake-Die für Server nicht nur 28, sondern 32 Kerne besitzt. Was nun als direkter „AMD-Zen-Konter“ von Intel berichtet wird

Already at the events in the summer like IDF 2016 and Hot Chips ComputerBase had repeatedly received the information that the Skylake server has not only 28 but 32 cores. What is now reported as direct "AMD Zen counter" by Intel

Looks like intel is now saying to partners that they will not only have 28C Skylake parts but 32C/64T ones too as a "direct Zen counter". AMD used similar wording at SC event when they said that fully enabled 32C/64T Zen parts will compete with new/unreleased Xeon E5-2699 V5.

 

[The Stilt]

Probability that AMD is deliberately running a misinformation campaign as a way to keep the cards tight to the vest?

Hard to say. Only one thing is certain: Real and fully accurate leaks are extremely hard to come by when it comes to Zeppelin. With previous product releases that has not been the case, meaning with Zeppelin AMD "chooses their friends" extremely carefully. ODMs naturally have access to the CPUs and the platforms, but the larger ODMs are pretty leak proof due their own security. Older stuff might be distributed more freely, but for now I see no reason why basically anyone outside AMD would receive the most recent stuff.

 

[mikk]

Dunno if this has been posted before:
https://www.computerbase.de/2016-11/skylake-ep-ex-32-kerne-cpu-xeon/
Looks like intel is now saying to partners that they will not only have 28C Skylake parts but 32C/64T ones too as a "direct Zen counter". AMD used similar wording at SC event when they said that fully enabled 32C/64T Zen parts will compete with new/unreleased Xeon E5-2699 V5.

Language barrier. It has nothing to do with Zen.

 

[iBoMbY]

The SKU naming would imply a new (non A0) stepping, which (as far as I know) doesn't exist. AFAIK only the node has been changing, which usually implies they're are fine tuning it and integrating errata workarounds, rather than fixing any major issues or errata requiring hardware changes. Node changes are not visible in the SKU, since the SKU only contains information about the major & minor die revision. Not impossible that such part exists, but I certainly doubt it.

The OPN is real, and I can proof it. I won't do it openly, because every other source has been put down by AMD so far. I will send the info to Dresdenboy via PN (on another forum), so he can verify it, and hopefully he will not tell too much about it.

 

[Arachnotronic]

The OPN is real, and I can proof it. I won't do it openly, because every other source has been put down by AMD so far. I will send the info to Dresdenboy via PN (on another forum), so he can verify it, and hopefully he will not tell too much about it.

Why is AMD being so secretive about a CPU that it has been touting since May 2015 and has literally been buying ad space for on Google?

 

[Arachnotronic]

Dunno if this has been posted before:
https://www.computerbase.de/2016-11/skylake-ep-ex-32-kerne-cpu-xeon/





Looks like intel is now saying to partners that they will not only have 28C Skylake parts but 32C/64T ones too as a "direct Zen counter". AMD used similar wording at SC event when they said that fully enabled 32C/64T Zen parts will compete with new/unreleased Xeon E5-2699 V5.

They reportedly said 2698 v5, not 2699 v5.

 

[cytg111]

Why is AMD being so secretive about a CPU that it has been touting since May 2015 and has literally been buying ad space for on Google?

Not giving the competition more room than necessary to counter move. Would be my guess.

 

[Arachnotronic]

Not giving the competition more room than necessary to counter move. Would be my guess.

Kaby Lake is set in stone at this point, being pumped out as we speak. Skylake-X will arrive well after Summit Ridge, so Intel has time to adjust them (if needed). I don't think this is the reason.

 

[sirmo]

Kaby Lake is set in stone at this point, being pumped out as we speak. Skylake-X will arrive well after Summit Ridge, so Intel has time to adjust them (if needed). I don't think this is the reason.

It's standard practice. By timing benchmarks and release at the same time they get to use the news cycle to push product (free advertisement). For Intel it doesn't matter much since they are already the default option. But I can see why AMD are being tight lipped.

 

[Doom2pro]

Not giving the competition more room than necessary to counter move. Would be my guess.

They are fighting an uphill battle vs a vastly more funded competitor, playing catch up to make things worse, they are on their last strike, failure is not an option so they absolutely need to lock things down and prevent people from releasing benchmarks or details on unfinished hardware which could possibly tarnish people's opinions before it's even released.

I am torn, I know they need to keep things locked down but at the same time I am extremely curious and want as much information as I can get.

Certain people act like they are confused as to why AMD is acting this way, suggesting it's because AMD is secretly clutching a rotten egg, but I'm pretty sure it's biased fanboy-ism more than anything.