AMD to transition to 28nm bulk in 2013 (digitimes)

[MLSCrow]

Man, this tread is 100% tl, but I did r, most of it at least. Anyway, if you haven't seen the article yet, it seems that AMD may actually end up sticking with AM3+ for Steamroller.

AMD sticks with stocket AM3+

As far as DDR4 is concerned...it may never see the light of day with what Rambus has up their sleeves. Whatever they're going to call it, it uses current DDR3 sockets, is as fast as DDR5, and consumes less power than standard DDR3 DIMMs. If they can bring that to the market soon...there won't be any need for DDR4.

Rambus' new RAM

Maybe this is old news for some of you, but considering the points that many have been making in this thread and the mention of DDR4 and AM4, I felt that perhaps this could shed some light.

 

[Idontcare]

TSMC cancelled 32-nm because it was SOI. TSMC was going to be the second foundry for 32-nm for AMD.

TSMC -> 32-nm SOI, the only customers AMD, IBM, Sony, and Microsoft. The reason it was cancelled was because initial benchmarks showed that SOI showed no improvement over the previous bulk node 40-nm from TSMC. TSMC was like no one but AMD, IBM, Sony, and Microsoft are going to buy because they are dimwits for SOI. So, TSMC dropped it like a rock and is now sporting a HUGE profit from 28-nm Bulk where is GlobalFoundries at this time... oh yeah in the red.

http://www.xbitlabs.com/news/other/...es_Unlikely_to_Become_Profitable_Shortly.html
^- See what the owners of AMD & ATIC say about GloFo.

http://www.eetimes.com/electronics-news/4390689/TSMC-profit-soars
^-- TSMC profits

The point is they let their customers decide whether or not 32nm would be offered.

When they went to the negotiating table with the few customers who had signed on to early PDK's for 32nm those customers were resistant to the idea of them paying more per wafer to subsidize their share of the required R&D.

For some reason TSMC gets the bad rap as having cancelled 32nm when the reality is that it was their customers who cancelled it by voting with their wallets. Capitalism as pure as it gets.

The question is what does GloFo do? Do they pursue developing SOI-based nodes for a customer whose ability to place large volume orders of those wafers is in question?

I know this because when I worked at TI we were a foundry for SUN and we had the same questions each and every year. SUN wanted low-k and HKMG for 90nm! We developed it, and then we told them how much it would cost to put it into production for them they staggered backwards while clutching their chests (figuratively, not literally ) and so it was shelved because of sticker shock until 45nm.

GloFo may be funded by oil money but it isn't managed by idiots. If the numbers don't make sense, and they must project those numbers 4-8 yrs into the future before making decisions today, then they won't pursue it. (Oracle is thinking that Intel is thinking the same thing about Itanium right about now )

 

[ShintaiDK]

One could also mention AMD is closing in for another layoff it seems. Less and less people to do more and more work.

 

[Idontcare]

One could also mention AMD is closing in for another layoff it seems. Less and less people to do more and more work.

Its the same story of Cyrix, for all the same reasons too. People have short term memories, or excess hope and dreams. If there is a difference

 

[pelov]

One could also mention AMD is closing in for another layoff it seems. Less and less people to do more and more work.

I think this mostly affects the management. It sucks that people are losing their jobs, but this does seem like a good round of layoffs for AMD. It was management that stifled projects and pursued dead ends.

 

[NostaSeronx]

Man, this tread is 100% tl, but I did r, most of it at least. Anyway, if you haven't seen the article yet, it seems that AMD may actually end up sticking with AM3+ for Steamroller.

AMD sticks with stocket AM3+

As far as DDR4 is concerned...it may never see the light of day with what Rambus has up their sleeves. Whatever they're going to call it, it uses current DDR3 sockets, is as fast as DDR5, and consumes less power than standard DDR3 DIMMs. If they can bring that to the market soon...there won't be any need for DDR4.

Rambus' new RAM

Maybe this is old news for some of you, but considering the points that many have been making in this thread and the mention of DDR4 and AM4, I felt that perhaps this could shed some light.

Orochi => Hypertransport 8 GT/s, 1 PCI-E 3.0 16x. 2x 64-bit DDR3
Viperfish => Hypertransport 16 GT/s, 2 PCI-E 3.0 16x, 4x 64-bit DDR3/DDR4

:whiste:

AM3+ infrastructure is divided between AM3 and AM4.
990FX/990X/970 = AM3 infrastructure(65-nm)
1090FX/1090X/1070 = AM4 infrastructure(32-nm)

 

[lifeblood]

Man, this tread is 100% tl, but I did r, most of it at least. Anyway, if you haven't seen the article yet, it seems that AMD may actually end up sticking with AM3+ for Steamroller.

AMD sticks with stocket AM3+

I can almost believe this and I don't like the insinuation. Many of us bought AM3+ boards in preperation of Bulldozer being a winner. As soon as BD was released and the truth was known, AMD announced PD would be an AM3+ chip to give us AM3+ owners hope. Well, PD is about to be released and AMD (assuming this is correct) again says the next CPU will be AM3+ compatible. I guess this means PD sucks as bad as BD.

Hopefully PD totally rocks and SR is AM3+ as well, but somehow I just don't think so.

Oh, this would also fly counter to what was in their roadmap slides, but roadmaps can be changed.

 

[Ajay]

It's 45% more IPC not 15% more IPC. The Front-end is getting doubled in power you have one 64B window instead of one 32B window. You have 8 decoders which are divided in to two portions one for Thread A and one for Thread B. The execution cores now operate like AGLUs where the EX units don't need the AGLU units to read from memory. The floating point is less redundant which allows it to have a higher clock than before. The L2 core interface is renewed or changed to have more, cache and performance. Execution Speed has been doubled at every point. Which leads to a 45% increase in instructions per cycle being executed.

Yeah, we heard that a little while ago, but with no supporting facts. Where did you dig them up? This is pretty huge, even if clocks drop 20%, performance will still be up around 25% !?

 

[ShintaiDK]

Yeah, we heard that a little while ago, but with no supporting facts. Where did you dig them up? This is pretty huge, even if clocks drop 20%, performance will still be up around 25% !?

Same place where Phenom was 50% faster than Core 2. Or where Bulldzoer would just destroy Intel.

 

[Roland00Address]

meanwhile, ST is supposed to have 30% more ipc, while haswell 10%

I have seen no one state that steamroller is going to be 30% faster for the same clock. I am sorry but that is just not going to happen.

 

[NostaSeronx]

Yeah, we heard that a little while ago, but with no supporting facts. Where did you dig them up? This is pretty huge, even if clocks drop 20%, performance will still be up around 25% !?

I'm not sure if anyone else has connected the dots but...
14h/16h core families are CMP versions of the 15h family which is CMT.

Two 14h cores => One 15h 00h-1Fh module
Four 16h cores => One 15h 20h-3Fh module

Two 14h cores have four DP FP units, four decoders, etc.
One 15h 00h-1Fh module has four DP FP units, four decoders, etc.

Four 16h cores have eight DP FP units, eight decoders, etc.
One 15h 20h-3Fh module has four DP FP units(that are double clocked/hot clocked?), eight decoders, etc.

Jaguar core improvements = Steamroller core improvements. The numbers aren't coming from nowhere or being made up, they are taken from Jaguar and converted to Steamroller.
Bobcat & Bulldozer => CPU Architects, Jaguar & Steamroller => GPU Architects.

We only have to look at Bobcat to see the deficiencies of Bulldozer, the same for Jaguar for Steamroller.

 

[Olikan]

I have seen no one state that steamroller is going to be 30% faster for the same clock. I am sorry but that is just not going to happen.

yes, i know that this don't translate in 30% more ipc...
but...
the decoders are the major bottleneck of bulldozer, even disabling one core, decoders still are a bottleneck...
it gives 20% more ipc to bulldozer, just by "being ready" when they jump to the correct core

30% ipc is likely, when the others major bottlecks don't get in the way...aka FPU and cache...
cache is likely to give trouble, they have been tweaked in piledriver, there is more changes in SR...but something will cause a bottleneck, cache is more likely...
FPU, in the other hand, might be even worse

 

[pelov]

We only have to look at Bobcat to see the deficiencies of Bulldozer, the same for Jaguar for Steamroller.

They're completely different core architectures. And unlike Bulldozer, Bobcat wasn't an absolute failure. Bobcat is probably AMD's best microprocessor since the AMD64 X2 and it's still one of their best selling processors, despite being on an aging 40nm node.

 

[tweakboy]

What will that give, less heat and possibly more OCing ?

That doesn't mean a thing.

Look guys Intel has the crown right now with their 3990x hexacore 12 threads.

Let AMD come and take that crown away then we can talk.

 

[CHADBOGA]

I have seen no one state that steamroller is going to be 30% faster for the same clock. I am sorry but that is just not going to happen.

When you are fixing up a weak IPC architecture, I would imagine you can make bigger leaps in IPC then when your starting base is a strong IPC architecture.

I could well believe they will achieve 30%, but that will still leave them at a significant IPC disadvantage to the Intel processor they will face at that time.