AMD X399 ！！！！！

[Edrick]

Cost. You make the L2 bigger, that increases your die size. And since the L3 is inclusive of the L2, they'd have to increase the size of the L3$ (or move to an exclusive L3).

If the leaks are correct, Intel is also reducing the L3 cache size on Sky-X (from 2.5MB/Core to 1.375MB/Core). So overall, these CPUs will have less total cache than previous Xeon CPUs. Does this mean Intel is moving to a full exclusive L3 model? How will this impact performance?

 

[scannall]

No one other than yourself used the words "sans avx" -- I think you're inferring something that isn't there. I was responding to the notion that no one would want a SkylakeX system once Whitehaven ships (or whatever we're calling it now). [Intel's leap into production would seem to bolster that claim, though I suggest Intel's move is to soak up as much early money as possible, and to starve demand for when AMD finally ships.]

AMD is definitely in the right ballpark with these processors, but that doesn't mean they're going to take home the prize and bury Intel. I don't understand the group of people that claim they will, nor the group of people who claim they need to. They only need to take market-share. It isn't yet about the war, it's about the battles.

Intel is still "Chipzilla". Will AMD make headway with these products? You bet. And it's good to be able to talk about them competing. But Intel isn't going anywhere anytime soon. Nor are they going to push their margins down any significant amount. They'll fiddle with the SKU's a bit, and maybe spend a little more on marketing. But they aren't going to cut prices much if at all. Nor do they need to. My build this summer will be an 8 core Ryzen, but I don't expect everyone else to have the same needs as I do."

 

[formulav8]

Naples and ThreadRipper will share the – almost – same Socket

 

[FlanK3r]

So, can we expect this platform for entusiast desktop also?

 

[lobz]

As for pricing :shrug:. My company purchased an 8-core Xeon recently, and put 512GB of RAM on it. I don't offhand know what either the CPU or the RAM cost, but pricing 512GB of DDR4 is an eye-opener. Again, for some use-cases, a $500 difference in pricing doesn't translate into much of a savings on the cost of the entire system.

That entire system cost will be the biggest advantage of the AMD server/workstation lineup, you just need to wait a few more weeks to see it with your own eyes and realize it. Not allowed to say much other than what you can find yourself: AMAZING I/O. I'm also glad they launched desktop first to gain a lot of experience with quirks that would have done irreparable damage in enterprise relations.

Sent from my VTR-L09 using Tapatalk

 

[T1beriu]

There was nothing to spot. It's mentioned in the second sentence from the source site.

I'm sorry, but that site is not a credible source. There have been too many times when they simply made up things "coming from their sources" that have been proven wrong when the products were launched. It's the sibling of that junk site that shall not be named.

Secondly, this information contradicts too many things that were released thursday in the ES Roadmap leak.

 

[PhonakV30]

4094 pins?! seriously? probably AMD wants to add HBM into ThreadRipper?

 

[lolfail9001]

4094 pins?! seriously? probably AMD wants to add HBM into ThreadRipper?

If it is Naples socket or even "almost" Naples socket, then why are you acting surprised? 4k pins for 8 channel sounds about right.

 

[PhonakV30]

If it is Naples socket or even "almost" Naples socket, then why are you acting surprised? 4k pins for 8 channel sounds about right.

heh ? It's Desktop's thread not Server ! just look at Wccftech(Link).SP3 socket does have 4094 pins and SP3r2 socket = 4094 pins.Why does AMD make too many pins for Desktop's socket?

 

[formulav8]

heh ? It's Desktop's thread not Server !

Similar to Intel's HEDT, AMD's HEDT is based on their server architectures. AMD's HEDT will have quad channel memory which in itself adds tons of pins.

 

[Ajay]

heh ? It's Desktop's thread not Server ! just look at Wccftech(Link).SP3 socket does have 4094 pins and SP3r2 socket = 4094 pins.Why does AMD make too many pins for Desktop's socket?

Like @formulav8 noted, the 4K pin socket is for Naples, it's just re-used for 'threadripper' to save money, etc.

 

[PhonakV30]

I think 4094 pins due to 64 Lanes PCIe.

https://cdn.videocardz.com/1/2017/05/AMD-Data-Center-Presentation-12_VC.jpg

How many pins do they need for quad channels?

 

[Ajay]

I don't know. But Naples will support 128 PCIe lanes and 8 channels - that's what the socket is designed for. It is being used on AMD's HEDT platform to reduce costs (development and production).

 

[Topweasel]

I think 4094 pins due to 64 Lanes PCIe.

https://cdn.videocardz.com/1/2017/05/AMD-Data-Center-Presentation-12_VC.jpg

How many pins do they need for quad channels?

1152 pins for quad. 2304 pins for 8 Channel, though some of them might be grounds that don't need to wired directly to the CPU. Also 18 pins per PCIe Channel (pin count goes done per channel when combined, 16x is 82 pins). Though again I don't know how many are from the CPU. Add Registered ECC and that increases. This is going to be a dense chip pin wise but the more SoC like these are the more pins you need. Remember also that AMD are targetting at least Naples into a chipset less experience. Heck even Ryzen can run on Atom sized chipset with the X300 and A/B 300. You try to pull that off it will require that many more pins.

 

[moonbogg]

64 pci-e lanes? Whoa. Not sure I can imagine them all being used, but more is better. 3 GPU's at x16 each would be cool. If DX12 MGPU takes off in a big way, then that will be a high end feature that people would want I'd think. All that aside, I seriously can't wait to see what Zen does with Quad channel ram. Several reviewers at least mentioned that Zen was bandwidth starved on some benchmarks. This will unleash the beast.

 

[dnavas]

I think 4094 pins due to 64 Lanes PCIe.
https://cdn.videocardz.com/1/2017/05/AMD-Data-Center-Presentation-12_VC.jpg
How many pins do they need for quad channels?

A lot of the data we have is a bit contradictory. 100W TDP for a 16 core??!
"up to" 64 lanes, but that's also talking about sharing that bandwidth with a coherent interconnect (32 lanes seems a little light for a dual core setup -- what is the interconnect broadcasting to?). I assume you'll also lose lanes the more 10gbe ports you start to use.

I don't know. But Naples will support 128 PCIe lanes and 8 channels - that's what the socket is designed for. It is being used on AMD's HEDT platform to reduce costs (development and production).

Yes, the socket is large because it supports 32 core processors and the I/O of that MCM. And in that case, 64 lanes, iirc, are used for dual-socket setups (which sounds like a decent amount of inter-socket bandwidth, though if you though the 8 core was held back by the infinity fabric, not sure how you're going to react here). Presumably any I/O comes out of those available lanes.

For whitehaven, if we're getting on-chip I/O, it might be best to treat this as anywhere between 40-48 lanes (in the same way as Ryzen 7 has 16 lanes + 8 lanes for chipset + X lanes for native I/O, where presumably we don't double chipset and native I/O). 48 lanes is definitely usable -- high-end video capture card, crap-ton of M.2, a 40GBE port, a couple of video cards. Boom, all gone But yes, that's quite a monster.

 

[bauerbrazil2014]

The hype train goes on....

source: http://tieba.baidu.com/p/5116196649

X399 with LGA4094 socket.

14nm LPU?

HEDT platform doesn't support ECC, server/workstation do.

HEDT platform has 44 pcie lanes.

Server/workstation platform support 2U/4U option, 8 channel DDR4 2933 with ECC support, but PCIe lane unknown.

Ryzen 9 1998X: 16C/32T, 3.5-3.8Ghz, TDP 155W

Ryzen 9 1998: 16C/32T, 3.2-3.6GHz, TDP 155W

Ryzen 9 1997X: 14C/28T, 3.5-3.9GHz, TDP 155W

Ryzen 9 1977: 14C/28T, 3.2-3.4GHz, TDP 140W

Ryzen 9 1976X: 12C/24T, 3.6-4.0GHz, TDP 140W

Ryzen 9 1956:12C/24T, 3.0-3.7GHz, TDP 125W

Ryzen 9 1955X: 10C/20T, 3.6-3.9GHz

Ryzen 9 1955: 10C/20T, 3.1-3.7GHz, TDP 125W

 

[wildhorse2k]

It seems hardly believable they can run 16C/32T at almost the same clocks like Ryzen 7 1800X (TDP 95W). In any case the 16C should be able to beat easily Skylake-X 12C.

 

[bauerbrazil2014]

It seems hardly believable they can run 16C/32T at almost the same clocks like Ryzen 7 1800X (TDP 95W). In any case the 16C should be able to beat easily Skylake-X 12C.

Maybe 14nm LPU?

 

[Topweasel]

It seems hardly believable they can run 16C/32T at almost the same clocks like Ryzen 7 1800X (TDP 95W). In any case the 16C should be able to beat easily Skylake-X 12C.

Keep in mind that the 1800x is already a 8 core CPU. I mean in the worst case just adding the two TDP's together and you are talking about 20w above the TDP of 160w. It wouldn't take much cherry picking, lowering the voltage just slightly, and down clocking (say like a 100MHz) to get it to the 160w threshold. Where as Intel has to down clock the SL server chip down to 2.9GHz to get it to 45w. Just adding those and your looking at 130w just for a 12c SL-x at 2.9. Give it some more breathing room I think they could get the clocks up to 3.2 or 3.3 to hit 160w. That said I expect SL-X to have a lot more minor improvements to help out clock speed including the projected drop in L3 cache. But Intel is certainly going to have to bring it's clocks down into the window of AMD's efficiency.

 

[raghu78]

the rumoured SKUs are too good to be true on 14LPP from a TDP point of view. But the 14LPU process mentioned here is a real wild card. I am not sure if 14LPU is in production yet.

https://news.samsung.com/global/sam...ndry-offerings-with-14lpu-and-10lpu-processes

"Process design kits (PDK) for 14LPU and 10LPU process technologies will be available during the second quarter of 2017."

Its impossible for Zen Threadripper to be manufactured at 14LPU if Samsung has said Q2 2017 for Process design kit availability. Its going to be interesting to see whether Zen server parts are manufactured on a better process. Anyway we will know within a few weeks.

 

[Veradun]

the rumoured SKUs are too good to be true on 14LPP from a TDP point of view.

TBH they are also too many to be true, 14LPP or not

 

[FlanK3r]

It seems hardly believable they can run 16C/32T at almost the same clocks like Ryzen 7 1800X (TDP 95W). In any case the 16C should be able to beat easily Skylake-X 12C.

Its possible, 24 threads can not beat 32 threads in multithreads. You can easy simulate it at Broadwell-E vs Skylake-DT. Example 8 threads Skylake vs 12 threads of BW-E (with lower clocks).

 

[mikk]

The hype train goes on....

source: http://tieba.baidu.com/p/5116196649

Do you believe in this? I mean so many SKUs, that doesn't make sense to me. There is no need for so many SKUs. AMD offers 3 different Ryzen 7 SKUs and in this leak there are 8 different Ryzen 9 SKUs. Plus AMD leaks are often fake (quite the opposite to Intel leaks), and this source is far from being reliable.

Ryzen 9 isn't for the mass given the price point will be higher then Ryzen 7, so many SKUs would be a waste.

 

[wildhorse2k]

Keep in mind that the 1800x is already a 8 core CPU. I mean in the worst case just adding the two TDP's together and you are talking about 20w above the TDP of 160w.

The TDP difference is 35W (155W - 2x95W). I don't think 100Mhz drop and little voltage drop would save that much TDP. I think base clock 3.2-3.3 would be more realistic. Or the given TDP is incorrect and will be higher. It seems its too early for threadripper to be manufactured using 14LPU.

Its possible, 24 threads can not beat 32 threads in multithreads. You can easy simulate it at Broadwell-E vs Skylake-DT. Example 8 threads Skylake vs 12 threads of BW-E (with lower clocks).

I would add that Skylake-X may have better IPC, but TDP inefficiency will require it to run at lower clocks thus negating its IPC advantage. This should not be the case for Skylake-X 10C which can still run at high clock speed and should offer the same performance as threadripper 12C, while delivering excellent gaming performance at the same time. Threadripper could also suffer from 4 CCX design making it only suitable for servers.