AMD X399 ！！！！！

[krumme]

I know I shouldn't be getting all uptight, but it's 33% more cores -- 12 * (4/3) = 16.



Average, although AVX2 will show heavy Intel advantage. Which is to say, there will be workloads that will skew heavily in Intel's favor.
Additionally, Intel will likely have more OC headroom, given that you can actually run their Broadwell line anywhere between 4 and 4.3Ghz or so without jacking the voltage too high. Given Intel is feeling a little heat, I wouldn't be surprised if they shipped Skylake with more aggressive clocks from the start.

I hope that the 16 core is competitive, but I wouldn't expect it to win in all cases.

Where does this 15%-20% more ipc on average sans avx come from?
Looks more like 7-10% to me sans avx loads take eg CB. Its not st perf ruling on 12/16c cpu.

 

[formulav8]

Where does this 15%-20% more ipc on average sans avx come from?

Intel is raising the level 2 cache to 1MB up from 256KB on their server based cores IIRC. I'm not sure how much it adds per clock, especially not knowing the latency.

 

[itsmydamnation]

Intel is raising the level 2 cache to 1MB up from 256KB on their server based cores IIRC. I'm not sure how much it adds per clock, especially not knowing the latency.

If big L2 caches were as important as some people make out Zen should be smashing skylake because its a fundamentally wider core and has a bigger L2 cache. The trade offs are far more complex, what these people are trying to say is there are all these workloads where there is upto 764kb of workload where the 5ns matters, the cpu was smart enough to have it in cache but not in the L1......... Yeah i dont buy that for a second,

The reason for the Big L2 will be to reduce pressure of those 512bit load and stores on the L3 sub system ( assuming intel keeps the same cache policy), now skyale-x could still have more IPC but that would be from actual mirco-architecture work which i assume they have done quite a lot of in area's like the load store system.

 

[mikk]

So I guess its on now. Yes, its on now. AMD will have 25% more cores and Intel will have probably about 15-20% more IPC.

Clock rate doesn't matter for you?

 

[krumme]

Clock rate doesn't matter for you?

Or efficiency?
Or price?
Very much Sir.

 

[formulav8]

If big L2 caches were as important as some people make out Zen should be smashing skylake because its a fundamentally wider core and has a bigger L2 cache.

Depends on the workload buddy. I'm sure certain workloads, especially certain server-based workloads will get a quite notable increase with the huge increase in L2 cache size that Intel is implementing.

 

[Ajay]

If big L2 caches were as important as some people make out Zen should be smashing skylake because its a fundamentally wider core and has a bigger L2 cache. The trade offs are far more complex, what these people are trying to say is there are all these workloads where there is upto 764kb of workload where the 5ns matters, the cpu was smart enough to have it in cache but not in the L1......... Yeah i dont buy that for a second,

The reason for the Big L2 will be to reduce pressure of those 512bit load and stores on the L3 sub system ( assuming intel keeps the same cache policy), now skyale-x could still have more IPC but that would be from actual mirco-architecture work which i assume they have done quite a lot of in area's like the load store system.

Well yes, that makes sense. I'm guessing some of Zen 'stunning' performance comes from it's larger L2 caches (compared to intel). Surely it is more complex than that - but we are just spitballing here since none of us have a 20 page architectural summary, including latency and throughput for critical areas of logic.

 

[itsmydamnation]

Depends on the workload buddy. I'm sure certain workloads, especially certain server-based workloads will get a quite notable increase with the huge increase in L2 cache size that Intel is implementing.

Why, the L2 was already backed by a quite fast L3. Your talking about workloads with Low ILP that are cache friendly enough to exsist in ~40mb of cache but not friendly enough to live in the L1 or L2. If there was such a big win from a large L2 why have they kept the L2 at a consistent 256kb for the last 10 years?

 

[Arachnotronic]

Why, the L2 was already backed by a quite fast L3. Your talking about workloads with Low ILP that are cache friendly enough to exsist in ~40mb of cache but not friendly enough to live in the L1 or L2. If there was such a big win from a large L2 why have they kept the L2 at a consistent 256kb for the last 10 years?

Cost. You make the L2 bigger, that increases your die size. And since the L3 is inclusive of the L2, they'd have to increase the size of the L3$ (or move to an exclusive L3).

 

[formulav8]

If there was such a big win from a large L2 why have they kept the L2 at a consistent 256kb for the last 10 years?

Multiple reasons could be including increasing server performance as a quick refresh for those holding out for something better. As well as the above reply.

But also possibly because they currently had no other option and had to rely on a backup plan that most companies have in case their future plans got delayed and still create a new or better option to increase performance with their current node. AMD did the same thing for Barton when Hammer was delayed. I'm not so sure Intel expected to stay on 14nm this long

Anyways, the L2 caches are closer to the L1 & core, lower latency and higher peak bandwidth than L3. That will help a lot when it come to cache misses and not having to ask the L3 as often.

 

[itsmydamnation]

Cost. You make the L2 bigger, that increases your die size. And since the L3 is inclusive of the L2, they'd have to increase the size of the L3$ (or move to an exclusive L3).

They dont have to make the L3 bigger at all, also intels cache policy is more complex then just exclusive/inclusive (so is AMD's as well, the L3 is mostly exclusive*). They could just make the L2 512kb, 1mb, 1.5mb and leave the L1 and L3 exactly the same if they wanted to, but they haven't changed them.

*they haven't detailed it yet for Zen other then saying its mostly exclusive but in BD based uarch if it was determined that a cache line was likely to be used by more then 1 core the cache line can be treated inclusively in the L3.

 

[moonbogg]

Clock rate doesn't matter for you?

No it doesn't, because I won't be paying whatever ridiculous price Intel is sure to charge for these chips anyway. They could clock to 6ghz and usher in the technological singularity right in my office, but I won't be tempted to spend $1,700 on the stupid thing.

 

[tamz_msc]

They're getting the same or slightly better initial clocks with sixteen core ES as they got with eight core ES. That's pretty impressive.

 

[piesquared]

I wonder if some of these CPUs listed are an indication of some semi-custom products. Maybe Acer, Dell, etc have custom ordered certain core configurations for particular markets. This is something AMD has suggested they could do or would be possible to do with there semi-custom business model if im not mistaken.

 

[Ajay]

They're getting the same or slightly better initial clocks with sixteen core ES as they got with eight core ES. That's pretty impressive.

Well, it's still a Zeppelin die (two in this case) and I think this is the new stepping. So I'm not surprised. Still, this CPU will provide the basis of a solid workstation/HEDT system - so long as the rollout goes better than Ryzen's did.

 

[moonbogg]

A chip basically equal to two 1800X's is going to be completely crazy to see.

 

[Ajay]

A chip basically equal to two 1800X's is going to be completely crazy to see.

That would be crazy. I would think two 1700s would be more likely, though leaks show a bit higher. If AMD manages two 1700Xs, well, that would be pretty special.

 

[mikk]

No it doesn't, because I won't be paying whatever ridiculous price Intel is sure to charge for these chips anyway. They could clock to 6ghz and usher in the technological singularity right in my office, but I won't be tempted to spend $1,700 on the stupid thing.

Your posting makes no sense then. You are telling us you don't care for performance.

 

[nenforcer]

As a Gamer, I am more interested in the X399 platform, than these CPUs.
I wonder how it will stack up against an equivalent X370 platform, in gaming..? (ie: Battlefield)

AMD is charging $500 retail for the Ryzen 7 1800X 8C / 16T. The IPC of the Naples 16C / 32T wont be any greater than Ryzen 5 / 7 and the clocks will probably be slower or identical at best. I expect the platform to cost significantly more as well. I am tempted to wait for X399 but I suspect motherboards will be $250+ and the chips themselves will be north of $500. I already have a X99 system with a quad core Xeon I got for $225. I dont think AMD will have any low cost chips for this platform and the quad channel memory and more PCI-E lanes are probably the biggest improvements for gaming, if any. You can already Crossfire / SLI on X370 so just prepare to pay through the roof for probably minimal gain as a gamer.

 

[Crumpet]

AMD is charging $500 retail for the Ryzen 7 1800X 8C / 16T. The IPC of the Naples 16C / 32T wont be any greater than Ryzen 5 / 7 and the clocks will probably be slower or identical at best. I expect the platform to cost significantly more as well. I am tempted to wait for X399 but I suspect motherboards will be $250+ and the chips themselves will be north of $500. I already have a X99 system with a quad core Xeon I got for $225. I dont think AMD will have any low cost chips for this platform and the quad channel memory and more PCI-E lanes are probably the biggest improvements for gaming, if any. You can already Crossfire / SLI on X370 so just prepare to pay through the roof for probably minimal gain as a gamer.

Why would they need low cost chips for that platform?

If you need less performance than the 16c32t provides you for less money.. you get a Ryzen 7.

 

[scannall]

AMD is charging $500 retail for the Ryzen 7 1800X 8C / 16T. The IPC of the Naples 16C / 32T wont be any greater than Ryzen 5 / 7 and the clocks will probably be slower or identical at best. I expect the platform to cost significantly more as well. I am tempted to wait for X399 but I suspect motherboards will be $250+ and the chips themselves will be north of $500. I already have a X99 system with a quad core Xeon I got for $225. I dont think AMD will have any low cost chips for this platform and the quad channel memory and more PCI-E lanes are probably the biggest improvements for gaming, if any. You can already Crossfire / SLI on X370 so just prepare to pay through the roof for probably minimal gain as a gamer.

I agree. If all you do is game, get a R5 1600, on a good motherboard and call it a day. The X399 stuff is more for workstations. Or prosumers that do modeling, rendering etc. Gaming wouldn't be the main interest in that platform.

 

[otinane]

This thread is gold. You just have to scroll back, since post No.1 and check who were the unfaithful plus the lousy future tellers.

 

[Glo.]

Why nobody have spotted that the roadmap is from February 2016?

 

[T1beriu]

There was nothing to spot. It's mentioned in the second sentence from the source site.

...the presentation is dated back in February 2016...

 

[dnavas]

Where does this 15%-20% more ipc on average sans avx come from?
Looks more like 7-10% to me sans avx loads take eg CB. Its not st perf ruling on 12/16c cpu.

No one other than yourself used the words "sans avx" -- I think you're inferring something that isn't there. I was responding to the notion that no one would want a SkylakeX system once Whitehaven ships (or whatever we're calling it now). [Intel's leap into production would seem to bolster that claim, though I suggest Intel's move is to soak up as much early money as possible, and to starve demand for when AMD finally ships.]

There's a lot of talk about "average IPC" as if, ultimately, that's the first and last comparison between CPUs. We're talking about workstations, which are niche products for niche markets with niche needs. Some use-cases will use the "average" mix of instructions, and "average IPC" differences will matter. But typically you're using the box for particular software. SSE and AVX performance will matter very much for some markets. Performance of virtualization will matter for some markets. Ryzen has issues for some use-cases which will make a higher IPC, lower CPU count processor more attractive. And that's just if these decisions are made logically. AVX-512 support is likely to spank a 16-core Ryzen, and sometimes those big losses leave a larger than logical impression on buyers. Imagine a buyer that says something like "why, yes, the 16-core is 20% faster for my highly parallel workload, but all my single-threaded code performance is 20% slower, and holy moses, if my software ever uses AVX-512, the AMD system will run at quarter speed -- better buy the Intel system just in case."

As for pricing :shrug:. My company purchased an 8-core Xeon recently, and put 512GB of RAM on it. I don't offhand know what either the CPU or the RAM cost, but pricing 512GB of DDR4 is an eye-opener. Again, for some use-cases, a $500 difference in pricing doesn't translate into much of a savings on the cost of the entire system.

AMD is definitely in the right ballpark with these processors, but that doesn't mean they're going to take home the prize and bury Intel. I don't understand the group of people that claim they will, nor the group of people who claim they need to. They only need to take market-share. It isn't yet about the war, it's about the battles.