Question 'Ampere'/Next-gen gaming uarch speculation thread

[Ottonomous]

How much is the Samsung 7nm EUV process expected to provide in terms of gains?
How will the RTX components be scaled/developed?
Any major architectural enhancements expected?
Will VRAM be bumped to 16/12/12 for the top three?
Will there be further fragmentation in the lineup? (Keeping turing at cheaper prices, while offering 'beefed up RTX' options at the top?)
Will the top card be capable of >4K60, at least 90?
Would Nvidia ever consider an HBM implementation in the gaming lineup?
Will Nvidia introduce new proprietary technologies again?

Sorry if imprudent/uncalled for, just interested in the forum member's thoughts.

 

[JasonLD]

Wouldn't be wrong if nVidia just calls SS8 "7 nm"

Come on now. When Samsung actually has 7nm and is totally different node from 8nm, that is not going to happen period.

 

[GoodRevrnd]

I don't have a dog in this fight, I just want to see something competitive. My gut says 3090 will still be halo, but AMD will have a real top-end product this time that will make people seriously question if 3090 is worth it even if it still has a respectable lead. The rumor mill and marketing cadence just doesn't read like a clear nVidia slam dunk this time. And why is everyone hung up on this one leak on VideoCardz that is contradictory to everything we've heard before about process? Did you all completely ignore the last sentence?

The data that we saw clearly mention the 7nm fabrication node. At this time we are unable to confirm if this is indeed true.

 

[jpiniero]

Come on now. When Samsung actually has 7nm and is totally different node from 8nm, that is not going to happen period.

That wouldn't be Samsung's doing, totally an nVidia marketing thing. Say they call it "7 nm class"

 

[Saylick]

That wouldn't be Samsung's doing, totally an nVidia marketing thing. Say they call it "7 nm class"

Calling Samsung's 8LPP node as "7nm class" is just as egregious as Samsung themselves using lower and lower numbers to make their older nodes look better. At least Intel was being honest that their 14nm++ was the third iteration of their 14nm node.

 

[JasonLD]

That wouldn't be Samsung's doing, totally an nVidia marketing thing. Say they call it "7 nm class"

Nvidia is not the one doing fabrication, so there is zero reason for them to sugercoat someone else's fabrication process.

 

[jpiniero]

Nvidia is not the one doing fabrication, so there is zero reason for them to sugercoat someone else's fabrication process.

This is nVidia we are talking about.

Now I do think it's a typo.

 

[MrTeal]

Wouldn't be wrong if nVidia just calls SS8 "7 nm"

7 en emms, +/- 1

 

[TESKATLIPOKA]

If 8 nm theoretical maximum Transistor Density is 61 mln/mm2, then it is still possible to achieve 627 mm2 die, with 35 bln transistors.

Its still 55 mln xTors/mm2.

That density however explains the power draw of 3090.

Navi 10 has much worse density yet It's built on 7nm process, so the likelihood of Ampere being a 8nm chip is close to zero. Or did you see a gpu which had a density close to the theoretical max process density?

 

[Glo.]

https://twitter.com/x/status/1299397612764688384

https://twitter.com/x/status/1299399692632031232

 

[JasonLD]

This is nVidia we are talking about.

Now I do think it's a typo.

Actual performance speaks the loudest. Why would Nvidia all the sudden care about what fabrication process they are based on to the point they would be lying about 8nm as "7nm class"? They just spent entire year on 12nm Super series competing against 7nm Navi lol.

 

[Glo.]

Navi 10 has much worse density yet It's built on 7nm process, so the likelihood of Ampere being a 8nm chip is close to zero. Or did you see a gpu which had a density close to the max?

IF so, then the 35 bln xTors on 102 chip is a complete bull.

Remember guys. Its almost 2X increase over RTX 2080 Ti.

 

[Kenmitch]

Navi 10 has much worse density yet It's built on 7nm process, so the likelihood of Ampere being a 8nm chip is close to zero. Or did you see a gpu which had a density close to the theoretical max process density?

Wouldn't less dense run cooler in the end? If so maybe it's intentional and not a limit.

 

[jpiniero]

IF so, then the 35 bln xTors on 102 chip is a complete bull.

Remember guys. Its almost 2X increase over RTX 2080 Ti.

As it should be, since it's a full node shrink. nVidia got 2.5X the transistors going from V100 -> A100, but that of course is on TSMC 7 nm.

 

[Glo.]

As it should be, since it's a full node shrink. nVidia got 2.5X the transistors going from V100 -> A100, but that of course is on TSMC 7 nm.

980 Ti - 8 bln xTors.
1080 Ti - 11.8 bln xTors.
2080 Ti - 18.6 bln xTors.
And now suddenly 3090 is 35 bln xTors?

Something is not right.

Shrinks usually are 50%-ish, not 100%-ish, aren't they?

 

[TESKATLIPOKA]

Wouldn't less dense run cooler in the end? If so maybe it's intentional and not a limit.

Yes, that's why the likelihood of It being close to theoretical max is close to zero, especially with such a high TDP.

 

[TESKATLIPOKA]

980 Ti - 8 bln xTors.
1080 Ti - 11.8 bln xTors.
2080 Ti - 18.6 bln xTors.
And now suddenly 3090 is 35 bln xTors?

Something is not right.

Shrinks usually are 50%-ish, not 100%-ish, aren't they?

If the info about size and transistor count is wrong, then It doesn't need to be 7nm. If It's correct, then it's 7nm process.

 

[jpiniero]

980 Ti - 8 bln xTors.
1080 Ti - 11.8 bln xTors.
2080 Ti - 18.6 bln xTors.
And now suddenly 3090 is 35 bln xTors?

Something is not right.

Shrinks usually are 50%-ish, not 100%-ish, aren't they?

Now that you mention it, it really should be less than 35b, but only somewhat, given that the die is smaller.

 

[Konan]

From bilibili - Broke out by frequency (binning), memory and SKU

 

[Glo.]

Now that you mention it, it really should be less than 35b, but only somewhat, given that the die is smaller.

Depends on the actual process node.

If it is 8 nm Samsung, then correct transistor count should be 25-28 bln xTors, for high performance chip with around 40-43 mln xTors/mm2 on a process with theoretical maximum transistor density of 61 mln xTors/mm2.

 

[Saylick]

980 Ti - 8 bln xTors.
1080 Ti - 11.8 bln xTors.
2080 Ti - 18.6 bln xTors.
And now suddenly 3090 is 35 bln xTors?

Something is not right.

Shrinks usually are 50%-ish, not 100%-ish, aren't they?

Just to play devil's advocate, if Ampere's architecture has a lot more L2 cache, and it might just be that if we go by the amount of L2 that A100 has, then that could drastically inflate transistor counts. A100 literally has 6.7x the L2 of V100 (40 MB vs 6 MB).

 

[Glo.]

Just to play devil's advocate, if Ampere's architecture has a lot more L2 cache, and it might just be that if we go by the amount of L2 that A100 has, then that could drastically inflate transistor counts. A100 literally has 6.7x the L2 of V100 (40 MB vs 6 MB).

Yup. That also might explain it.

 

[TESKATLIPOKA]

I don't believe a slower model would have more VRAM than the stronger one. Yes I know It happened with Pascal -> GTX 1060 3GB vs GTX 1050 Ti 4GB.

 

[jpiniero]

Depends on the actual process node.

If it is 8 nm Samsung, then correct transistor count should be 25-28 bln xTors, for high performance chip with around 40-43 mln xTors/mm2 on a process with theoretical maximum transistor density of 61 mln xTors/mm2.

TU102 is 25 mln xTors/mm2, at 32b GA102 would be 51.

 

[Glo.]

https://twitter.com/x/status/1299407024887943170

 

[Kenmitch]

https://twitter.com/x/status/1299407024887943170

Looking at the number sequences makes me believe it's fake.