Anandtech：Intel's Skylake-SP Xeon VS AMD's EPYC 7000

[Mopetar]

So that AVX2 FP score means that intel's approach of building monster avx units doesn't work and its better to have more smaller units?

It works fine (remember than Intel has 4 fewer cores as well) from a design approach, but for what Intel is charging it doesn't make a lot of financial sense. I suppose if you're building a 4P or 8P box, then Intel wins by default, but for a 2P box, AMD offers similar performance for ~$12,000 less.

 

[moinmoin]

So that AVX2 FP score means that intel's approach of building monster avx units doesn't work and its better to have more smaller units?

For sub AVX512 definitely. And considering the other issues Intel's approach introduced (downclocking cores whenever AVX is used, still heating up chips way beyond their TDP as the i9 chips have shown) the worth versus more power efficient dedicated GPUs is imo not there.

 

[Nothingness]

EPYC 7601 ，TDP 180W..$4200
Xeon 8180 ，TDP 205W..$10009


SPEC CPU2006


CINT2006 Rates

AMD EPYC 7601（AVX2） 2360 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX512） 2930 HTML CSV PDF PS Text Config


------------------------------
CFP2006 Rates

AMD EPYC 7601（AVX2） 1840 HTML CSV PDF PS Text Config
intel Xeon 8180（AVX2） 1890 HTML CSV PDF PS Text Config

I guess forcing AVX2 for CFP2006 means that using AVX-512 resulted in lower scores.

This can mean several things:

1. poor compiler; I kind of doubt it as icc has supported AVX-512 for years
   
2. SPEC benchmarks don't have enough loops that benefit from using 512-bit vectors, but enough that the reduced clock has to be enabled, resulting in lower scores
3. AVX-512 simply stinks on Skylake-SP.

I bet on 2.

 

[rgba]

SPEC benchmarks don't have enough loops that benefit from using 512-bit vectors, but enough that the reduced

SPECfp doesn't seem to benefit much from AVX2 either

 

[Nothingness]

SPECfp doesn't seem to benefit much from AVX2 either

Interesting. Do you have a source for that?

 

[rgba]

Interesting. Do you have a source for that?

This article. They've run SPEC2006 suite on the R7 1800X, i7 6900K, i7 7700K and A12-9800 using MSVC and ICC2017 compilers with SSE, AVX and AVX2 flags. AVX2 results were only marginally better.

 

[Nothingness]

This article. They've run SPEC2006 suite on the R7 1800X, i7 6900K, i7 7700K and A12-9800 using MSVC and ICC2017 compilers with SSE, AVX and AVX2 flags. AVX2 results were only marginally better.

I don't feel like paying to read it. Does AVX get a good speedup? Most 256-bit FP instructions came with AVX. AVX2 would only gain something if FMA can be used.

 

[Malogeek]

I still think that anything less than 15 gig database does not show much. How big is the Anandtech forum database ? Its still rather small compared to what I am used to I bet.

AT is a fairly large forum and as a XenForo forum owner I wouldn't be surprised if it's over 10Gb. Xenforo has a lot of caching entries and indexing.

Throw it in a VM with a lot of memory allocated, do some appropriate InnoDB tweaking and see how some intensive queries perform.

 

[tamz_msc]

I don't feel like paying to read it. Does AVX get a good speedup? Most 256-bit FP instructions came with AVX. AVX2 would only gain something if FMA can be used.

I've read that. Extremely minor difference between SSE3 and AVX, somewhat better with AVX2(5-8%). I guess people need to start testing with SPEC2017. Ryzen seems to have strong non-AVX FP performance, the 1800X is 12% faster than the 6900K in single threaded SPECfp2006.

 

[StefanR5R]

So that AVX2 FP score means that intel's approach of building monster avx units doesn't work and its better to have more smaller units?

From what I understood:

• The two AVX512 FMACs per core can only be used with AVX512 aware code. Which in turn gives a performance uplift over AVX256 or AVX128 only if the data are organized suitably, and due to scaling laws the uplift is less than 100 % in theory, and far less than 100 % in practice, even with perfectly suitable data.
• Without special AVX512 code, one of the two AVX512 FMACs of Skylake-SP will be unused, and the other will be repurposed as two AVX256 FMACs.
• In comparison, Zen/ Zeppelin/ EPYC has got two AVX128 FMACs per core, and it splits AVX256 operations such that these two FMACs perform on half of the vector data each, in parallel.
• This sounds at first as if Zen had only 1/2 of the theoretical AVX256 throughput as Skylake, but AFAIU it actually has more than that due to differences of the capabilities of the AVX pipelines in Zen compared to Skylake.
• However, there are many floating point workloads out there which cannot be vectorized easily, and lots of legacy code which technically could be optimized but won't be anytime soon, or ever. And Zen's FP units look to perform very well with such code, very different from AMD's previous core designs.

For sub AVX512 definitely. And considering the other issues Intel's approach introduced (downclocking cores whenever AVX is used, still heating up chips way beyond their TDP as the i9 chips have shown) the worth versus more power efficient dedicated GPUs is imo not there.

Re heating up: Power draw of i9 CPUs (on overclocker boards with overclocker BIOS and possibly user-configured power limits) is of no indication for power draw of Xeon CPUs. I expect that Skylake-SP behaves like previous Xeon generations and won't have a time-averaged power draw greater than TDP.

Re downclocking and energy use: If you have workloads suitable for AVX and code optimized for AVX, the throughput and the energy efficiency will exceed that of classic code despite lower clocks and despite higher energy use. Increased vector sizes will have diminishing returns on real workloads though, to varying degree.