Technotronic
Junior Member
- Jul 12, 2017
- 23
- 78
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Agreed. Using DDR4-2400 for the EPYC system when it is validated for DDR4-2666. If they didn't have the memory supplied then the revew should have been halted. They were even supplied DDR4-2666 RAM! They literally didn't even offer a clue as to why. Only this.IMHO Anandtech's testing isn't all that valid. Who doesn't virtualize their servers now? Would it have been difficult to install Hyper-V?
Notice that the DDR4 DRAM in the EPYC system ran at 2400 GT/s (8 channels), while the Intel system ran its DRAM at 2666 GT/s (6 channels).
Also.. they used an extremely odd dataset size to test "database" performance. They used a set that is literally able to fit in the Xeon's L3. Just a few dozen megabytes. Most databases that actually require fast server chips like this are in the gigabyte or more range. My Fortune 500 company uses a primary database that is 45 TBs! Not to mention Anandtech even admitted
and thenAccording to AMD, if you enable Memory Interleaving, performance should rise a bit (+10-15%?). Unfortunately, a few days before our deadline our connection to the BMC failed, so we could not try it out
A small database that can be mostly cached in the L3-cache is the worst case scenario for EPYC.
I mean.. WHAT?! They knowingly published benchmarks without a plug and play 15% performance option then even more mind blowing they use a data set that is <50mb for actual database benchmarking?! Enterprise databases are NEVER that small.. why would they use a database that fits perfectly inside a Xeon's L3?