Considering how the A7 wowed everyone and the A8 has the benefit of a shrink, this is overall a pretty disappointing effort in my view.
What happened to all that ARM magic pixie dust that was supposed to leave Intel & x86 in its wake?
On the basis of the A8, I don't see ARM challenging x86 on the desktop, anytime soon.
The results seem to be similar for GFXbench 3.0 too, so I guess they did work for native on-screen resolution. This is from AnandTech's review:
Notice how much slower the 6 Plus performs. This is a factor of two difference.
the performance improves better for SPEC (~21% geomean) than for Geekbench (~13% geomean)
Woot SPECint results! That's great. Found this (and verified the results):
http://investorshub.advfn.com/boards/read_msg.aspx?message_id=106776907
It seems the tweaks Apple has made to its CPU are benefiting more larger workloads.
You already had linked the article, and the quoted message adds some information AT didn't have, that is the total score improvement rather than the individual scores. But I agree I should have also linked AT pageUh, this is from AnandTech's review. You may as well link the original article.
You already had linked the article, and the quoted message adds some information AT didn't have, that is the total score improvement rather than the individual scores. But I agree I should have also linked AT page
BTW AT got it wrong: the most branch heavy SPEC tests are perlbmk and gcc. perlbmk depends on indirect branch prediction correctness, while gcc depends on general branch prediction.
And while I am at it, A8 SPECint score is 1493. Close to Itanium 2 :biggrin:
Interesting thanks! Note that a "real" SPEC result would need a lot of tuning; for instance some of the tests suffer when compiled for 64-bit (e.g. mcf) so some tests should be compiled for 32-bit while others should be compiled for 64-bit.Allegedly, the ARM Cortex A57 delivers 1250 in SpecInt 2k @ 1.7GHz.
http://www.eetimes.com/document.asp?doc_id=1262718
Assuming linear scaling with clocks, the 2GHz Cortex A57s in the S810 should do about as well.
Interesting thanks! Note that a "real" SPEC result would need a lot of tuning; for instance some of the tests suffer when compiled for 64-bit (e.g. mcf) so some tests should be compiled for 32-bit while others should be compiled for 64-bit.
BTW do we have SPECint 2000 results for some recent Intel CPUs?
Don't think so; Intel has to my knowledge only publicized SpecInt2k6 for Avoton.
SPECint rate
SPEC 2006
So these are not directly comparable
BTW do we have SPECint 2000 results for some recent Intel CPUs?
Oh, and to tie this back in with the A8... Adjust a Core 2 Duo result for frequency and compare it to A8. They trade blows, with the A8 coming ahead by maybe 5%. And then by comparing how Core 2 Duo stands against Haswell in SPECint 2006 we can derive a rough idea of how A8 compares to Haswell in something other than geekbench.
For more accurate comparisons one should look at the subscores, the global score is exageratly dominated by a sub test in recent uarch, Libquantum, that is the cause of most of the difference between a Core 2 and a recent i3.
I didn't really follow the discussion too much, but do you mean that Haswell has a 1.72x higher IPC than Cyclone? I thought they were about the same?So instead of being 2.21x faster per clock it's 1.72x.
I didn't really follow the discussion too much, but do you mean that Haswell has a 1.72x higher IPC than Cyclone? I thought they were about the same?
Where have you heard that about Skylake?
14mm manufacturing process
3.5 billion transistor without integrated graphic unit.
LGA 1151 socket
Z170/H170 chipset (Sunrise Point)
Thermal Design Power (TDP) up to 95 W (LGA 1151)
Support for both DDR3 and DDR4 SDRAM in mainstream variants, with up to 64 GB of RAM on LGA 1151 variants.
Support for 20 PCI Express 3.0 lanes (LGA 1151)
Support for PCI Express 4.0 (Skylake-E/EP/EX)
Support for Thunderbolt 3.0 (Alpine Ridge)
128 KB L1 cache (64 KB 16-way set associative instruction cache + 64 KB 16-way set associative data cache; two cycles)
512 KB L2 cache, 16-way set associative (six cycles)
12 MB L3 cache, 24-way set associative (12 cycles)
64 to 128 MB L4 eDRAM cache on certain SKUs.
Up to four cores as the default mainstream configuration
Support for SATA Express
AVX-512F: Advanced Vector Extensions 3.2
Instruction decoder increase from 4 (since core 2) to 6 in skylake and stage pipeline are also increase to 6 issue.
Intel SHA Extensions: SHA-1 and SHA-256 (Secure Hash Algorithms)
Intel MPX (Memory Protection Extensions)
Intel ADX (Multi-Precision Add-Carry Instruction Extensions)
Skylake's integrated GPU supports Direct3D 12 at feature level 12.
It probably is time for Intel to bump up their L1 cache sizes, though. But 2 cycle latency, while simultaneously doubling the size?
Calculating few numbers in that chart shows that Core i3 is average 2x the performance without Libquantum.
My unofficial estimates were-
Core 2 E4xxx-->E6xxx: 5%
Core 2 65nm to Core 2 45nm: 5%
Core 2 45nm to Nehalem: 10%
Nehalem to Westmere: 0%
Westmere to Sandy Bridge: 20%
Sandy Bridge to Ivy Bridge: 5%
Ivy Bridge to Haswell: 10%
Total: 68%
So that's pretty close, since Spec is more indicative of server use and server gains are better than for client.
One has to be careful with SPEC results: Intel is known to tune icc with it, while I doubt LLVM is being tuned with SPEC, so there's some bias (other companies such as Sun did/do the same). Also between the i3 and Core Duo there are more than 7 years of compiler tuningThat's a comparison between a Core 2 Duo E4300 and an i3-4130 scaled to equivalent clock speed in SPECint 2006. Which is of interest because a Core 2 Duo E4300 result in SPECint 2000 scaled down to 1.4 GHz is only around 5% slower than A8's score. Which would imply that if we had either an A8 score for SPECint 2006 or a Haswell score for SPECint 2000 we'd most likely see Haswell something around 1.64x faster than A8.