Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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M4 Family discussion here:

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[FlameTail]

According to Johny Srouji, Apple started its chip design odyssey with 40-50 engineers, and now they have thousands. Despite this, he emphasized several times that "Apple is NOT a chip company". Hmmm...

LOL.

Apple's chip design arm is bigger than several entire dedicated chip companies.

 

[FlameTail]

Do we expect the next gen M4 Max to raise core counts again?

M1 Max: 8P + 2E
M2 Max: 8P + 4E
M3 Max: 12P + 4E

Every generation has increased core counts so far.

 

[Doug S]

LOL.

Apple's chip design arm is bigger than several entire dedicated chip companies.

Depends how they are counting, and what.

I assume they are counting the GPU, the NPU, the fixed function media encoders/decoders, the watch CPU and SoC, the Airpod chip, the Vision Pro SoC, the team that is working (was working?) on their modem, the wifi & bluetooth chips...

Plus some undoubtedly working on stuff that remains secret.

 

[FlameTail]

Have you guys noticed this pattern?

Apple is always the first to debut a chip on the newest leading process node

A14 Bionic : First 5nm phone chip
M1 : First 5nm laptop chip

A17 Pro: First 3nm phone chip
M3 : First 3nm laptop chip

Therefore I am guessing, M5 will be the first laptop chip on TSMC 2nm (N2).

M4 will be either N3E or N3P.

 

[Doug S]

Have you guys noticed this pattern?

Apple is always the first to debut a chip on the newest leading process node

A14 Bionic : First 5nm phone chip
M1 : First 5nm laptop chip

A17 Pro: First 3nm phone chip
M3 : First 3nm laptop chip

Therefore I am guessing, M5 will be the first laptop chip on TSMC 2nm (N2).

M4 will be either N3E or N3P.

That's because it has lined up that way with TSMC's node introductions - no surprise given that Apple is responsible for a quarter of TSMC's revenue.

However, N3B was "available" months before A17P came out. Apple was first because no one else (other than perhaps Intel) wanted to have anything to do with it. They will not be first with N3E, and probably not first with N3P.

I bet they won't be first with N2 either - I don't think they will have anything made on standard N2. I think they will be first for "N2+BSPDN" (see Ian's article linked in the Leading Edge Foundry thread) in 2026.

I still say Apple is not an on 18 month cadence with Apple Silicon, it just worked out that way for various reasons as they got it off the ground with its stable of Pro/Max/Ultra variants. The fact they had M3, M3 Pro and M3 Max all coming out at the same time (for the first time) right on the heels of A17P tells me they have got things aligned the way they want, and that's how I expect future releases to work - though possibly in some cases we might see Apple Silicon come out a bit before the iPhone SoC that's its "cousin". If we don't see M4 until spring 2025 then I'll be forced to eat crow. If I'm right, A20 and M6 will be the first "N2+BSPDN" chips, with A18/M4 on N3E and A19/M5 on N3P.

 

[FlameTail]

Well, I don't know if there is a need to update Apple Silicon every 12 months. I mean Apple certainly had the cash and resources to do it, but is it worth it?

Macs aren't as high volume as iPhones, and with Macs you have to design 3 different large scale chips yearly if you go for a 12 month cadence.

In contrary to how it's only necessary to design one new chip for the iPhone every year.

 

[FlameTail]

I'm right, A20 and M6 will be the first "N2+BSPDN" chips, with A18/M4 on N3E and A19/M5 on N3P.

Isn't BSPDN more suited to HPC (Desktop, Server, Laptop) chips instead of mobile (phone) chips?

 

[Mopetar]

Well, I don't know if there is a need to update Apple Silicon every 12 months. I mean Apple certainly had the cash and resources to do it, but is it worth it?

They have enough different product lines that they can always have something new out for particular yearly times just be rotating products. One year the back-to-school had a new MacBook and the next year it's a Air that gets released in time for that.

18-24 months for a new M-series CPU seems more appropriate than trying to hit a yearly cadence.

 

[Doug S]

Isn't BSPDN more suited to HPC (Desktop, Server, Laptop) chips instead of mobile (phone) chips?

BSPDN doesn't just allow for more performance, it also allows for somewhat smaller chips (how much smaller isn't clear to me, but we'll get more information eventually) becauase in certain blocks chip area is limited by wire routing rather than transistor density.

Any performance increases are also automatically power reductions, if you choose to operate the chip at a lower frequency than it is possible for it to obtain to save power. You already see Apple using the exact same cores in the e.g. A17P and M3 with the M3 clocked about 10% higher. They are made on the same process but Apple has to limit the clock rate of the cores in the iPhone because it has a reduced power budget compared to larger form factors like the Macbook Air, or devices with active cooling like Macbook Pro.

So whether a new technology like BSPDN is more suited to HPC (and I really hate that that term seems to have lost all of its former meaning and now includes even laptops) or smartphones is irrelevant, it creates improvements for both.

 

[Doug S]

They have enough different product lines that they can always have something new out for particular yearly times just be rotating products. One year the back-to-school had a new MacBook and the next year it's a Air that gets released in time for that.

18-24 months for a new M-series CPU seems more appropriate than trying to hit a yearly cadence.

I've always agreed that two years would not be an unreasonable cadence. What makes no sense at all is 18 months.

 

[igor_kavinski]

What makes no sense at all is 18 months.

Makes perfect sense.

Watch and learn:

18 months = 540 days

1+8=9 and 5+4+0=9 <<<< makes sense

24 months = 720 days

2+4=6 and 7+2+0=9 <<<< Error encountered. Results do not match. Abort! Abort!

What would also make sense is 36 months.

36 months = 1080 days

3+6=9 and 1+0+8+0=9 <<<< all is well

 

[FlameTail]

Do we expect the next gen M4 Max to raise core counts again?

M1 Max: 8P + 2E
M2 Max: 8P + 4E
M3 Max: 12P + 4E

Every generation has increased core counts so far.

 

[Doug S]

Do we expect the next gen M4 Max to raise core counts again?

M1 Max: 8P + 2E
M2 Max: 8P + 4E
M3 Max: 12P + 4E

Every generation has increased core counts so far.

Iterations of the N3 family aren't going to provide much in the way of additional transistor budget, though better yield versus N3B may allow for larger die size if they want more transistors than what density increases provide. The answer to your question would depend on what Apple prioritizes as important in future iterations of Apple Silicon. They may want to devote additional transistors to GPU, or even NPU (i.e. if they released some sort of AppleLLM that runs on a Mac Pro) rather than CPU.

 

[FlameTail]

On the other hand the base M3 is still using a 4P+4E as the original M1 did 3 years ago.

I think a bump to base M core count is due. 4P+4E is roughly equal to 6P cores in the x86 world (such as the 6-core Ryzens).

Especially if the iPhone CPU bumps up to a 2P+6E setup, which I think will have happen in either A18 or A19- since the SD8G4 is said to use a 2P+6E setup.

 

[mikegg]

I've always agreed that two years would not be an unreasonable cadence. What makes no sense at all is 18 months.

You can check my post history here. I've always said that 1-year cadence makes the most sense for Apple. There is a lot of evidence to suggest that Apple also thinks so. They couldn't hit the 1-year cadence for base M2 and M3 for a variety of reasons including covid shortage, WFH, Macbook Air redesign being late. But M3 Pro/Max was released only 9 months after M2 Pro/Max.

M2 Pro/Max was likely severely delayed as well as the base M2.

Remember that Apple Silicon goes into far more devices than the original big AX chips for iPads, which many here used as an argument for Apple not doing yearly updates.

Devices that used big Ax chips:

• iPad Pro
• iPad Air

Devices that use Apple Silicon (also just big Ax chips):

• iPad Pro
• iPad Air
• Macbook Air
• Mac Mini
• iMac
• Macbook Pro 14
• Macbook Pro 16
• Mac Studio
• Mac Pro
• Vision Pro and future Vision variants

Why wouldn't Apple want to update these devices as often as possible to increase sales? After all, the iPhone already pays for most of the yearly R&D for new Apple Silicon chips. In the past, updating a chip yearly just for the big iPads made no sense. In 2024, it makes all the sense in the world due to so many devices now relying on that update.

 

[Doug S]

Vision Pro and future Vision variants

Those aren't using Apple Silicon. Vision Pro is using the 'R1' which is a different family similar to how Apple Silicon is not the same as the iPhone SoCs.

Obviously Apple will be using the same cores across the whole line, leveraging that investment in core design across even more products.

 

[ashFTW]

Those aren't using Apple Silicon. Vision Pro is using the 'R1' which is a different family similar to how Apple Silicon is not the same as the iPhone SoCs.

Obviously Apple will be using the same cores across the whole line, leveraging that investment in core design across even more products.

Vision Pro also uses M2.

 

[mikegg]

Those aren't using Apple Silicon. Vision Pro is using the 'R1' which is a different family similar to how Apple Silicon is not the same as the iPhone SoCs.

Obviously Apple will be using the same cores across the whole line, leveraging that investment in core design across even more products.

 

[FlameTail]

8x display engines in M3 Max?

So does this mean it supports 8 displays?

But then, why does the official Apple page say this:

MacBook Pro models introduced in 2023 or later with the M2 Max or M3 Max chip support up to four external displays simultaneously, based on the resolution (up to 8K) and refresh rate (up to 240Hz) of each external display.Nov 15, 2023

 

[Mopetar]

Even if the chip could drive more, it may not have the physical connections in the packaging or other parts of the hardware that would enable it to do so. They might also artificially limit it for other reasons.

 

[Doug S]

Even if the chip could drive more, it may not have the physical connections in the packaging or other parts of the hardware that would enable it to do so. They might also artificially limit it for other reasons.

Yes, according to the specs the M3 Macbook Pro has 1 HMDI and two USB/TB ports, the M3 Pro/Max version ups that to three USB/TB ports. Not sure if you can plug two monitors into a single USB3 or TB4 port, and even if that's supported by the standard Apple may not support it in macOS.

There has to be reason why M3 Max has 8 display engines. Maybe for future versions of Studio or Mac Pro? Currently those support 8 displays with an M2 Ultra, but the Studio with a M2 Max supports "only" 5.

Maybe two display engines are paired together to support 8K? The Mac Pro with M2 Ultra supports 8 4K or 6 6K or 4 8K displays.

 

[Nothingness]

To my admittedly untrained eyes, there seems to be only 4 replicated parts in the display box. Isn’t the x8 an error in the label?

 

[Mopetar]

I don't think I'd be that worried. Being able to drive 4x 8K displays is already at the extreme edge of what most professionals would need.

I use 3x 4K displays at work and some people think that's crazy.

 

[FlameTail]

So this is a question in general about display engines, not just the ones in Apple Silicon.

Say for example: a chip has four display engines that each support a 4K external monitor. So can all four of the engines combine together to support an 8K display (since 8K is four times 4K) ?

 

[Doug S]

To my admittedly untrained eyes, there seems to be only 4 replicated parts in the display box. Isn’t the x8 an error in the label?

It looks like four, but each of the four are mirror image layouts, so it does look very much like it could be eight.

In my (admittedly highly amateur) experience of examining die photos, that sort of mirroring is common for pairing I/O blocks. I'm sure there's a reason why they are so often laid out like that, but I don't know what that reason is (probably something you have to be an EE to fully understand like parasitic capacitance)