Discussion Apple Silicon SoC thread

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Eug

Lifer
Mar 11, 2000
23,741
1,275
126
M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:


M1 Ultra discussion here:


M2 discussion here:


Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:


M4 Family discussion here:

 
Last edited:

The Hardcard

Member
Oct 19, 2021
113
159
86
I don't buy that Apple would use their existing chips, unchanged, if they were going to build their own dedicated hardware for AI cloud clusters. They might use something existing for a pilot to give the software guys something to work with (which I'm willing to bet is where the M2 Ultra rumors come from) but they'd design a new chip for something they'd deploy for real. It is too inefficient to use existing chips that have a lot of die area devoted to stuff that isn't helping the AI cause, plus LPDDR just isn't appropriate to their needs for dedicated AI clusters.
The guy Apple hired to lead this effort, Sumit Gupta, believes scale out with huge numbers of small hardware is better than buying hardware than can handle many requests per device. He is considered to have successfully implemented this concept at Google as the product manager for all Google infrastructure including the Google TPU and Arm based datacenter CPUs.

The chips at least will be unchanged since the weakest link for the M2 Ultra is the lack of compute. Prompt processing and handling large context is far and away the biggest problem. and fixing that would not only be complex and expensive, but then they would cease to be M2 Ultras.

When you get to inferencing, the LPDDR is very workable. Far from top-notch, but it will do given the rumors that their initial AI offerings are not going to be big time tasks in 2024-25.

Plus, regardless of what you think is better, it is far easier for Apple to get two or three hundred thousand 5 nm wafers from TSMC than it is to get anywhere near the needed amount of big GPU hardware in this timeframe.
 
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FlameTail

Diamond Member
Dec 15, 2021
3,122
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Forget about M4 (which is limited to the iPad for now).

It seems Strix Point has failed to topple even the M3's ST performance.

Apple still reigns as the king of laptop ST performance.

People give cr** to Apple all the time for their diminishing P-core IPC gains in recent years, yet Apple continues to improve P-core performance, even if it is by pushing frequency. And they have the world's most efficient E-core. Period.
TWO MORE DAYS
Kek.
 
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FlameTail

Diamond Member
Dec 15, 2021
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It is pretty interesting the entire industry seems to have converged at Firestorm-class IPC.

For those who are unaware, Firestorm is the name of the P-core in Apple M1. I would define "Firestorm-Class IPC" as being +/- 20% to that of the IPC of Firestorm.

Apple M4-P, ARM Cortex X925 and Qualcomm Oryon V1 are all Firestorm-class cores. According to Adroc, AMD will also be joining the podium with Zen5.

I was right. So we agree, @poke01
 

Eug

Lifer
Mar 11, 2000
23,741
1,275
126
There is now another binned variant of M2 (not M4), in the 2024 iPad Air only, something that Apple failed to disclose at launch. It was launched with the spec listed as a 10-core GPU. It appears to be an error with their marketing team.

This 9-core variant is also a first for M2. Previously it was 8-core or 10-core.


Apple has made a quiet update to the tech specs of the M2 iPad Air, which first launched last month. Despite originally touting the iPad Air’s M2 chip as featuring a 10-core GPU, the company now says it features a 9-core GPU.
 

Mopetar

Diamond Member
Jan 31, 2011
8,000
6,433
136
It's hardly surprising that everyone is struggling to increase IPC given that everyone has a wider architecture. It's just simple math. If you ignore that the chip may be bottlenecked for other reasons adding execution ports has diminishing returns.

1 -> 2 = 100%
2 -> 3 = 50%
3 -> 4 = 33%
4 -> 5 = 25%
5 -> 6 = 20%
6 -> 7 = 16%

That's just the ideal performance improvement. Never mind that when you have more execution ports you're likely going to need a larger reorder buffer to be able to keep them fed, a beefier front end to issue enough instructions to fill that buffer, and a cache that can keep up with all of that.
 
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Nothingness

Platinum Member
Jul 3, 2013
2,717
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Going from one execution port to two doubles the performance but going to three halves that improvement? Trying to understand how that happens. Why is the performance improvement dropping in a predictable manner?
I think Mopetar made it clear: under perfect conditions if you double the number of a blocking resource you get a 100% improvement; if you go from 3 to 4 you can expect 33% improvement. Is that clearer writting this way?

These are the theoretical max you can get.
 
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Jul 27, 2020
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their future is doomed. /s
Once they hit a frequency and IPC wall in their current architecture, they will include a RISC-V co-processor at some point, to increase performance coz it's gonna be simpler, smaller and cheaper than adding more of their current "fat" cores. With each generation, they will make it fatter and more performant and I guess we can look forward to another decade of "innovation" from them. They can do something like that coz their developers are willing zombies and will rewrite their entire apps/applications to appease Apple instead of getting delisted from the App Store due to failing to meet Apple's updated iOS/MacOS development guidelines.
 

okoroezenwa

Member
Dec 22, 2020
50
50
61
Once they hit a frequency and IPC wall in their current architecture, they will include a RISC-V co-processor at some point, to increase performance coz it's gonna be simpler, smaller and cheaper than adding more of their current "fat" cores. With each generation, they will make it fatter and more performant and I guess we can look forward to another decade of "innovation" from them. They can do something like that coz their developers are willing zombies and will rewrite their entire apps/applications to appease Apple instead of getting delisted from the App Store due to failing to meet Apple's updated iOS/MacOS development guidelines.
The fanfiction is cute at least.

But I do wonder how they (and everyone else it seems) will deal with the diminishing returns they seem to be getting.
 

poke01

Golden Member
Mar 8, 2022
1,337
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Once they hit a frequency and IPC wall in their current architecture, they will include a RISC-V co-processor at some point, to increase performance coz it's gonna be simpler, smaller and cheaper than adding more of their current "fat" cores. With each generation, they will make it fatter and more performant and I guess we can look forward to another decade of "innovation" from them. They can do something like that coz their developers are willing zombies and will rewrite their entire apps/applications to appease Apple instead of getting delisted from the App Store due to failing to meet Apple's updated iOS/MacOS development guidelines.
RISC-V isn’t some magic bullet, it really isn’t. Plus Apple signed a with ARM for 40 years.

If you think Apples cores are fat, take a look at Lion cove. Apple can’t fatten their cores but Intel and AMD can and widen them as much as they want.

what was AMD’s and Intel’s innovation this computex, they failed to even meet M1’s IPC that’s a four year old chip. Apple is so far ahead in IPC it’s almost like AMD/Intel are incompetent at being CPU companies.

As for calling devs zombies that’s a low ball, attack a $3T corporation, fine. But devs are lifeblood of the tech industry. It’s not a good thing to say. It’s insulting and if you know how a binaries work it’s not hard to change an x86 Mac app into a am64 one. It’s trivial.
 

FlameTail

Diamond Member
Dec 15, 2021
3,122
1,786
106
With Lion Cove only bringing a 14% IPC uplift, and Zen5 only bringing 16%...

Apple is looking better than ever. They have the crown of ST performance, and they wear it well.
 

poke01

Golden Member
Mar 8, 2022
1,337
1,510
106
I doubt it's trivial for every app. Those depending on low level hardware access will need to be recoded. Unless hardware abstraction is something perfected by and at Apple to such a degree that they stand alone on that mountain.
It is trivial but some apps do require more time due to the amount of plugins etc. and there are companies that are slow to convert so Apple provides a translation layer. As more and more ARM Macs increase in market share over x86 Macs, the development of Mac ARM apps will speed up and will be given more priority.

Also how do think the Switch gets native ports, its pretty straightforward to convert a x86 game into a arm64 game. Nintendo is the biggest example of this, their system is ARM based and they switched architectures many times.
 

Eug

Lifer
Mar 11, 2000
23,741
1,275
126
I doubt it's trivial for every app. Those depending on low level hardware access will need to be recoded. Unless hardware abstraction is something perfected by and at Apple to such a degree that they stand alone on that mountain.
There was a article supposedly from an ex-Apple employee that back in the day before the transition away from PowerPC to Intel, the code for all major new Mac applications had to be sent to a mysterious department at Apple to ensure that it abided by their code compliance guidelines. IIRC, I got the impression the devs weren’t completely sure what exactly was happening in that department, but after the Intel transition announcement in mid-2005, everyone understood why. Ironically, around the same time, Microsoft had announced Xbox 360 on PowerPC.

I wonder how religiously Apple still takes hardware abstraction these days now that they build their own chips, but I would hope very seriously.
 
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Jul 27, 2020
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They have the crown of ST performance, and they wear it well.
Except it's wasted in my opinion since all Steam games will not run on Apple Silicon hardware and for those that do, it's a very expensive way to enjoy those games and stupid too since you can easily get a decent experience on a dedicated x86 gaming laptop in the same price range. ST performance crown doesn't help with GPU performance deficit there.
 
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Jul 27, 2020
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Also how do think the Switch gets native ports, its pretty straightforward to convert a x86 game into a arm64 game. Nintendo is the biggest example of this, their system is ARM based and they switched architectures many times.
No idea about the porting toolkit Nintendo provides but again, you make it sound too simplified.
 
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