Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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M4 Family discussion here:

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[poke01]

Except it's wasted in my opinion since all Steam games will not run on Apple Silicon hardware and for those that do, it's a very expensive way to enjoy those games and stupid too since you can easily get a decent experience on a dedicated x86 gaming laptop in the same price range. ST performance crown doesn't help with GPU performance deficit there.

It is wasted, sadly. gaming on the Mac is expensive no upgrades and no huge game library that is plug and play.


Maybe one day with royal core, Intel will regain the IPC crown but until then Apple can have it, at least Mac’s are great dev machines. Compiling is excellent on M chips.

 

[The Hardcard]

Once they hit a frequency and IPC wall in their current architecture, they will include a RISC-V co-processor at some point, to increase performance coz it's gonna be simpler, smaller and cheaper than adding more of their current "fat" cores. With each generation, they will make it fatter and more performant and I guess we can look forward to another decade of "innovation" from them. They can do something like that coz their developers are willing zombies and will rewrite their entire apps/applications to appease Apple instead of getting delisted from the App Store due to failing to meet Apple's updated iOS/MacOS development guidelines.

There is no ISA-specific IPC wall. None of the work for modern top performance or performance per watt is related to ISA. The ISA may affect how chip architects specifically implement design principles, but all modern techniques can be implemented with any ISA.

 

[FlameTail]

Also how do think the Switch gets native ports, its pretty straightforward to convert a x86 game into a arm64 game. Nintendo is the biggest example of this, their system is ARM based and they switched architectures many times.

So... Windows-on-ARM native gaming is coming?

 

[poke01]

So... Windows-on-ARM native gaming is coming?

It’s barely got any market share, switch is a mammoth in terms of units sold.

 

[Mopetar]

Any source for that or something you gleaned from your personal experience?

It's just basic math. If you go from one of something to two of something (an increase of one) and can fully utilize the additional thing, you get a 100% increase (i.e. double) performance. Adding one more and going from two to three things only increases the performance by 50% over what could be achieved with two of those things.

But that's just the theoretical maximum. For example, you could add another cashier at a store, but if there aren't enough customers that cashier won't be busy all of the time.

 

[poke01]

ST and IPC isn’t just for video games. There’s more to CPUs than just games.

ST and IPC improvements benefit productivity workflows as well. Macs were never the main platform for gaming anyway; they were always for creatives and developers.

 

[FlameTail]

Laptop CPU comparison (by Flametail)

Seems like Apple will keep the ST performance crown for years to come...

PS: If you notice any errors with the numbers, notify me so I'll correct them.

 

[Nothingness]

Laptop CPU comparison (by Flametail)
View attachment 100470
Seems like Apple will keep the ST performance crown for years to come...

PS: If you notice any errors with the numbers, notify me so I'll correct them.

Thanks, that's interesting!

I prefer to use this as reference: https://browser.geekbench.com/ios-benchmarks
This should be more accurate as it is the average performance which should help get rid of pointless nitrogen results

For X1E84100, the average result seems to be about 2900.

For Cortex-X925, given the ~2600 result computed in the other thread, and assuming clock scaling (doubtful of course) that'd give ~2900.

 

[FlameTail]

M4 uarch updated diagrams by Cardyak;

https://twitter.com/x/status/1798008420278427762

 

[FlameTail]

All hail the king of IPC! (meme)

Spoiler

 

[poke01]

All hail the king of IPC! (meme)

Spoiler

View attachment 100559

That picture will be totally different by the end of 2025. Meaning a new IPC king might arrive…

 

[FlameTail]

That picture will be totally different by the end of 2025

Sure, but this is how the current state of things is.

Meaning a new IPC king might arrive…

Who do you reckon it is?

 

[Gerard Williams]

Sure, but this is how the current state of things is.

Who do you reckon it is?

 

[Mopetar]

That picture will be totally different by the end of 2025. Meaning a new IPC king might arrive…

I'm pretty sure the M5 will be out be then, so that's hardly surprising.

 

[FlameTail]

 

[SpudLobby]

That picture will be totally different by the end of 2025. Meaning a new IPC king might arrive…

lmfao. The new king will, if it changes, at best be Oryon V2. Not anyone else. Bet on it.

 

[SpudLobby]

Oh, well, more to my point: 😀

 

[FlameTail]

lmfao. The new king will, if it changes, at best be Oryon V2. Not anyone else. Bet on it.

I wonder what Apple is doing. It seems they have fully turned to the dark side, and jacking up clock speeds by large amounts every generation.

Unless they change trajectory, M5 will be hitting 5 GHz.

 

[poke01]

I wonder what Apple is doing. It seems they have fully turned to the dark side, and jacking up clock speeds by large amounts every generation.

??? And Qualcomm, AMD and Intel don’t??

Apple is still fine to increase clock as they got room.

AMD and Intel stagnated in terms of max clocks this generation.

 

[poke01]

Next year will be very interesting. Apple on N3P, Intel on 18A and Qualcomm/Mediatek on N3P/N2.

2025 will be more interesting than 2024 in the CPU world.

 

[kingsleyopara]

Next year will be very interesting. Apple on N3P, Intel on 18A and Qualcomm/Mediatek on N3P/N2.

What makes you think Qualcomm/Mediatek might be first to N2 over Apple?

 

[poke01]

What makes you think Qualcomm/Mediatek might be first to N2 over Apple?

Just a guess. Apple has to meet the September deadline for iPhones. QC/MTK have some leeway.

 

[Doug S]

Just a guess. Apple has to meet the September deadline for iPhones. QC/MTK have some leeway.

Has TSMC given any information as to when in "H2" N2 is ready? If it is like N3B/N3E and begins mass production in December, then Apple may have the first chips out with M6 in May and they slide immediately into A20 production for the September iPhone 18 launch.

There was news recently of a "secret meeting" between Apple's COO and TSMC's CEO regarding Apple "reserving all of TSMC's N2 capacity".

If Apple needs capacity for more than Apple Silicon and iPhone SoCs, like maybe for their rumored AI chips for internal needs, they may be able to soak up the first six months or so of TSMC's production.

 

[FlameTail]

Has TSMC given any information as to when in "H2" N2 is ready? If it is like N3B/N3E and begins mass production in December, then Apple may have the first chips out with M6 in May and they slide immediately into A20 production for the September iPhone 18 launch.

There was news recently of a "secret meeting" between Apple's COO and TSMC's CEO regarding Apple "reserving all of TSMC's N2 capacity".

If Apple needs capacity for more than Apple Silicon and iPhone SoCs, like maybe for their rumored AI chips for internal needs, they may be able to soak up the first six months or so of TSMC's production.

Geez, I hope Apple isn't going to eat up all the N2 capacity. I want the Snapdragon 8G6 and Dimensity 9600 (2026Q4 Android SoCs) to be N2.

 

[Mopetar]

I wonder what Apple is doing. It seems they have fully turned to the dark side, and jacking up clock speeds by large amounts every generation.

Unless they change trajectory, M5 will be hitting 5 GHz.

Even if they changed nothing else, they'd slowly get there just from node improvements. Their alternative is to keep the clock speeds the same while using less power, but they're already leading in that respect, so they take the performance.

There are several ways to go about improving an architecture. If they can find ways of tweaking their designs to enable the slowest pipeline stages to finish faster and therefore the clock rates to be increased that's no less valid than finding other ways to increase performance.