Discussion Apple Silicon SoC thread

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Eug

Lifer
Mar 11, 2000
23,823
1,392
126
M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:


M1 Ultra discussion here:


M2 discussion here:


Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:


M4 Family discussion here:

 
Last edited:

Nothingness

Diamond Member
Jul 3, 2013
3,087
2,081
136
View attachment 108928
by Andrei (of course) - Apple had surpassed Intel by 2018
One has to be careful with this kind of comparisons. Performance counters can count things differently, though I'd expect Andrei to have done a proper job here as usual.

Another example of things to keep in mind is that some ISA differences can lead to large differences in the number of branches. For instance, A12 relies on loops for doing memory copies, while x86 can use rep mov instruction. I guess this explains the difference in the number of branches in 403.gcc. For the rest Arm has more conditional ALU instructions which might help a lot with hard to predict branches.
 

The Hardcard

Senior member
Oct 19, 2021
217
308
106
Got a source/screenshot? Seems pretty far fetched.
The expectation is around 165, maybe a tad higher.
The Youtubers Maxtech speak Russian (are Russian descent?). They posted a video about the absconded Macbook Pros and Romancev768 who has one of the machines replied. Maxtech arranged for a private discussion.’

They have to be lowkey since it’s unclear how hard and wide Apple is going to drop the boom on this. But Vadim posted the 174 score in his Twitter without screenshots or other verification. I don’t think he wants to openly say he is working with these guys for results. But, he may just happen to have more details in the next weeks.
 

gdansk

Platinum Member
Feb 8, 2011
2,955
4,465
136
For reference Notebook Check has this chart:

This Vadim fellow is pretty useless despite having access to the hardware.
 

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The Hardcard

Senior member
Oct 19, 2021
217
308
106
Hopefully M4 Pro gets 8P+6E config. At least it'll equal M1 and M2 Pros.

I think M4 Max will get 12P + 6E. So not much improvement.

If the M4 Ultra is 24P + 12E, that's a very nice upgrade over the 16P + 8E M2 Ultra. Worthy upgrade.
Donan, Brava, and Hidra. These were referenced by Mark Gurman several months ago, also a couple of other random references ny those guys who imply they are in or connected to the loop and drop occasional nuggets of claimed information on upcoming silicon…

If their chatter has any truth, then the next Ultra won’t be two Max dies.

The M4 does appear to be Donan, as was referenced. The Pro and Max as claimed will both come from Brava. What that means is not clear yet. Will it be M1-M2 style of a design for the Max with part cut off to make the Pro? Or will 2 Pros be Ultrafused to make a Max? We’ll know in a month. The 1st option gives the Pro 2 performance clusters, the other way is just one.

I am going to speculate that the M3 Pro design was intentional and that the Max will be 2 Bravas. Then the question is how many cores in a cluster. Since it’s clear they jacked the performance of the cores (more by frequency than IPC, but nevertheless jacked) I will speculate that the clusters will stay at six.

So, M4 Pro is 6P + 6e and Max 12P + 12e.

1 Four e cores are more than enough for background tasks, 6 in the M4 is firmly in the helping with multithreaded performance territory. Apple’s e cores can’t take over workloads like Skymont, but with 1/3 the performance at 1/10 the power (below 1 watt!) they seem to serve their purpose. So I don’t think 12 e cores would be weird.

2 Most likely Brava will have a 192-bit memory bus, 384-bit for the Max. As is typical, Apple will most likely be satisfied with the same general, maybe even a little less bandwidth by putting faster memory on a smaller bus.

Apple has acknowledged the machine learning research community buying Macs. I hold a small hope that give the community a nod and boost the bandwidth to the 500 - 600 GB/s range on a 512-bit bus. Even if they gave Brava a 256-bit bus to achieve this, the M4 Pro will still probably only use 192 bits at 7500 MT.

Whatever happens there, the Ultra is claimed to get its own die, Hidra. The top Apple machines would use two Hidras (will there be Mac with just one?) This means Apple can freely choose the compute resources and bandwidth of the Ultra without being limited by decisions that allow the Max to operate in a laptop.

It will instead be driven by datacenter needs despite it also being a consumer product. I also still think it isn’t launching until late next year as M5 Ultra, not M4. Ithink they are developing it with the advanced packaging technologies that won’t hit the volume manufacturing stage until 2H next year. There is also a strong possibility they want to do it on N2.
 
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