Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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M4 Family discussion here:

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[jeanlain]

Dunno if that's cold enough. Might have had to use liquid nitrogen to pull that off.

I don't think that's necessary to cool a CPU consuming 10W.

 

[Doug S]

Heating isn't going to be a problem with GB6 since it runs so quickly.

 

[Frenetic Pony]

The "A17 Pro" might have the Pro part because come next year both the Iphone and Iphone Pro models will be on the A18. Except the A18 non Pro will be a binned A18 with lower clocks/a core disabled/somesuch.

I'd assumed they switched to the this/last years model difference not because the chip itself was that much cheaper from last years, but because DDR5 was new and expensive at the time and last years was DDR4 when they first moved.

Now that DDR5 has gotten cheap, like it was intended to be, moving to two bins allows the Pro model to still feel special, the non pro to not feel like they're missing out as much, and for higher yields thanks to two bins.

Don't know if it's true, but it's best reason for adding "Pro" to the SOC I can think of right now.

 

[Eug]

The "A17 Pro" might have the Pro part because come next year both the Iphone and Iphone Pro models will be on the A18. Except the A18 non Pro will be a binned A18 with lower clocks/a core disabled/somesuch.

I'd assumed they switched to the this/last years model difference not because the chip itself was that much cheaper from last years, but because DDR5 was new and expensive at the time and last years was DDR4 when they first moved.

Now that DDR5 has gotten cheap, like it was intended to be, moving to two bins allows the Pro model to still feel special, the non pro to not feel like they're missing out as much, and for higher yields thanks to two bins.

Don't know if it's true, but it's best reason for adding "Pro" to the SOC I can think of right now.

The "Mobile phone chip expert" leaker is claiming iPhone 16 non-pro will use A17 built on N3E.

Sina Visitor System

I hypothesized this in an earlier post:

Well, we have had the A10 Fusion and a bunch of Ax Bionic chips too. I’ve never understood the point of these suffixes. So, while you could be right, I’m not yet totally convinced. And yes I could see the “Pro” chip in the lower end models… a year later.

That said, that could explain the A17 N3B / N3E rumour. Maybe A17 Pro is N3B, and then in 2024 there will be the A17 on N3E for iPhone 16 and 16 Plus. It would be a different chip, based on the A17 core, but not a binned A17 Pro.

 

[Doug S]

The "A17 Pro" might have the Pro part because come next year both the Iphone and Iphone Pro models will be on the A18. Except the A18 non Pro will be a binned A18 with lower clocks/a core disabled/somesuch.

I'd assumed they switched to the this/last years model difference not because the chip itself was that much cheaper from last years, but because DDR5 was new and expensive at the time and last years was DDR4 when they first moved.

Now that DDR5 has gotten cheap, like it was intended to be, moving to two bins allows the Pro model to still feel special, the non pro to not feel like they're missing out as much, and for higher yields thanks to two bins.

Don't know if it's true, but it's best reason for adding "Pro" to the SOC I can think of right now.

I think that the split last year may have been due to the cost difference for LPDDR5, and this year there's obviously the N3B thing - cost difference, lack of sufficient supply, who knows. Theoretically they could re-merge and give everything A18s but the only binning Apple has ever done for iPhone SoCs has been on number of GPU cores. They have relied on using a process that's working well enough that there's little benefit to binning on clock speed. I doubt they could split by even 200 MHz at the bin sizes they'd need for Pro and non Pro iPhone 16s.

And sure, LPDDR5 is cheaper, so maybe next year the Pro gets LPDDR5X and bingo there's the cost reason to continue the Pro split. That would require using an SoC in the non Pro that does LPDDR5, which they have in the A17. I think it is a given it will be made on N3E, and it sure sounds like A17s will start being made on N3E well before the iPhone 16 ships. Maybe once A17s are made in N3E and Apple is no longer paying for "known good die" they will start binning on number of GPU cores like they have in the past - they'll save ones with only 5 working GPU cores, call them "A17" instead of "A17 Pro", and put them in the non-Pro iPhone 16s next fall. I would not be at all surprised if one GPU core is the only thing that distinguishes a "Pro" SoC.

 

[Orfosaurio]

Dunno if that's cold enough. Might have had to use liquid nitrogen to pull that off.

You're joking, right?

 

[poke01]

https://x.com/Tech_Reve/status/1706472603752575103?s=20

Apple has the smallest P cores now

 

[coercitiv]

^^^^

Did they test it in the Freezer?

Probably more something like this, this is the setup Geerwan used to get 2999/7779 GB6 score a week ago. Unlikely to help with the ST score, may help the MT score up considering the 14W peak.

 

[FlameTail]

So how much caches are in the A17 chip?

 

[FlameTail]

https://x.com/Tech_Reve/status/1706472603752575103?s=20

Apple has the smallest P cores now

Same caches as the A16, eh?

 

[FlameTail]

Who will do a die shot analysis of the A17?

Angstronomics? Semianalysis?

 

[trivik12]

103mm vs 113m mm. A17 pro has 19% more transistors compared to A1 and so I wonder what is the density of this chip?

Based on 19B xtors info provided by Apple, its 184.46 MTr/mm2. Very impressive indeed.

 

[Doug S]

Same caches as the A16, eh?

Not surprising since Apple's caches were already so large and cache density gains have completely disappeared with the N3 generation.

 

[Doug S]

103mm vs 113m mm. A17 pro has 19% more transistors compared to A1 and so I wonder what is the density of this chip?

Apple said 19 billion transistors so around 185 Mtr/mm^2. Not that that metric has much meaning anymore given that it is so dependent on how much cache you have, and with N3E will be further dependent on what mix of transistor types you choose from the FinFlex menu.

 

[hemedans]

Yup. I guess we finally have a true succesor to Andrei's in-depth reviews of mobile CPUs at Anandtech.

Offtopic, just want to Say Dr Ian Cutress do use Andrei graph and He updated it to include modern soc like SD 8 Gen 2, you can check his YouTube Chanell Techtechpotato,

 

[Mopetar]

You're joking, right?

I'd like to think it should have been obvious.

That said I'd love to see GN Steve make a troll video where he just drops an iPhone into the pot as a meme.

 

[Frenetic Pony]

Not surprising since Apple's caches were already so large and cache density gains have completely disappeared with the N3 generation.

I'm pretty sure I remember reading about a new TSMC SRAM design that improves density via that (rather than node shrink) . It's shown up in Zen 4c: https://www.semianalysis.com/p/zen-4c-amds-response-to-hyperscale

However it's not a drop in replacement and so needs a redesign. That density loving Apple doesn't seem to have used this, and that both CPU core types have shrunk by the same amount lends credence to the CPU just being a straight port to N3B. Given that they're switching to N3E right quick maybe they didn't think it was worth a new design.

 

[FlameTail]

Offtopic, just want to Say Dr Ian Cutress do use Andrei graph and He updated it to include modern soc like SD 8 Gen 2, you can check his YouTube Chanell Techtechpotato,

I know about the great Dr Ian Cuttess and his channel.

But he unfortunately doesn't do testing in the scale of Geekerwan or even the former Andrei, which is understandable since he now has little spare time to do so.

 

[SpudLobby]

I think that the split last year may have been due to the cost difference for LPDDR5, and this year there's obviously the N3B thing - cost difference, lack of sufficient supply, who knows. Theoretically they could re-merge and give everything A18s but the only binning Apple has ever done for iPhone SoCs has been on number of GPU cores. They have relied on using a process that's working well enough that there's little benefit to binning on clock speed. I doubt they could split by even 200 MHz at the bin sizes they'd need for Pro and non Pro iPhone 16s.

And sure, LPDDR5 is cheaper, so maybe next year the Pro gets LPDDR5X and bingo there's the cost reason to continue the Pro split. That would require using an SoC in the non Pro that does LPDDR5, which they have in the A17. I think it is a given it will be made on N3E, and it sure sounds like A17s will start being made on N3E well before the iPhone 16 ships. Maybe once A17s are made in N3E and Apple is no longer paying for "known good die" they will start binning on number of GPU cores like they have in the past - they'll save ones with only 5 working GPU cores, call them "A17" instead of "A17 Pro", and put them in the non-Pro iPhone 16s next fall. I would not be at all surprised if one GPU core is the only thing that distinguishes a "Pro" SoC.

On the A15 for the iPhone 14 they felt no such need to distinguish via Pro vs Non-Pro RE: binning the GPU core to 4, which is what they did for the iPhone 13 vs 13 Pro (4 cores and 5 cores respectively).

So no I don't think so. It will have to be more than that.

Glad you came around to the N3E part though because I think that's remarkably obvious at this point with the Pro naming and previous rumor.

I do think they'll cut frequency though, I could see them doing that and dropping a GPU core for the "regular" A17 on N3E.

 

[SpudLobby]

It's extremely clear where the direction has been going RE: bifurcating the iPhone lineup and I said this about two months ago. Sure enough, we now see N3B looks a bit messy (though I don't think Apple did a great job either) and indeed N3E's intended purpose is not merely for show, there is significant reason to believe Apple would gain from taping out another die on N3E.

What's more is the "A17 Pro" branding.

And then we get this:

iPhone 16 to Feature First A-Series Chip Designed Specifically for Standard Models

The A17 chip designed for the iPhone 16 and iPhone 16 Plus will be made using a fundamentally different manufacturing process to the A17 Pro in the...

www.macrumors.com

Also in this link is an analyst's confirmed rumor RE: N3E A17 from about two weeks ago:

iPhone 16 and iPhone 16 Plus Rumored to Feature Enhanced A17 Chip and 8GB Memory

The iPhone 16 and iPhone 16 Plus will feature 8GB of memory and an A17 Bionic chip fabricated with TSMC's N3E process, according to Jeff Pu, a...

www.macrumors.com

Good choice by Apple and will surely pay off. You keep seeing people say N3E has lower transistor density and thus lower efficiency but in practice if parametric yields are subpar on N3B and N3E has FinFLEX - I think N3E will prove a lower variance, and generally more performant process.

I think A17 N3E version will have a smaller GPU - 4/5 cores - lower clock speeds on the CPU (improves effective yields and might improve their area), and plausibly less SRAM or a smaller neural engine.

Or they could do virtually the same thing besides the GPU and just call it a day, maybe the savings from the SRAM density on N3B don't make up for the mediocre yields and it doesn't matter.

 

[Doug S]

You keep seeing people say N3E has lower transistor density and thus lower efficiency but in practice if parametric yields are subpar on N3B and N3E has FinFLEX - I think N3E will prove a lower variance, and generally more performant process.

You don't need to worry about what people are saying, when TSMC provides the info on how N3B and N3E compare (and I'll bet the N3B numbers were based on the optimistic scenario which may not reflect the full range of A17s delivered to Apple) and Anandtech articles have included them more than once.

Based on TSMC's own claims comparing N3B to N5 and N3E to N5, N3E should have 5-9% better power, 3-8% better performance, but 5-10% less density - though FinFlex may allow some density reduction by choosing where density matters more and performance matters less and vice versa (it isn't clear whether those numbers they gave included any usage of FinFlex...I'm assuming not)

Since it uses fewer EUV layers per wafer pricing will almost certainly make up for the reduced density so the per chip pricing is likely better. And that's before you take the whole yield issue into account, which Apple didn't due to TSMC's KGD pricing. Now that we can see exactly how bad N3B is, it does kinda look like TSMC basically bribed Apple to use N3B so they wouldn't be in a position where they went a whole year after announcing the start of N3 mass production before they had any actual N3 wafer starts!

 

[SpudLobby]

You don't need to worry about what people are saying, when TSMC provides the info on how N3B and N3E compare (and I'll bet the N3B numbers were based on the optimistic scenario which may not reflect the full range of A17s delivered to Apple) and Anandtech articles have included them more than once.

Based on TSMC's own claims comparing N3B to N5 and N3E to N5, N3E should have 5-9% better power, 3-8% better performance, but 5-10% less density - though FinFlex may allow some density reduction by choosing where density matters more and performance matters less and vice versa (it isn't clear whether those numbers they gave included any usage of FinFlex...I'm assuming not)

Since it uses fewer EUV layers per wafer pricing will almost certainly make up for the reduced density so the per chip pricing is likely better. And that's before you take the whole yield issue into account, which Apple didn't due to TSMC's KGD pricing. Now that we can see exactly how bad N3B is, it does kinda look like TSMC basically bribed Apple to use N3B so they wouldn't be in a position where they went a whole year after announcing the start of N3 mass production before they had any actual N3 wafer starts!

Those quotes are using FinFLEX to the maximum extent possible in either direction to my understanding. I don’t think it actually changes *too* much and in practice it should still be much better given the yields are awful but the last time this came up someone pointed this out IME

 

[Doug S]

Those quotes are using FinFLEX to the maximum extent possible in either direction to my understanding. I don’t think it actually changes *too* much and in practice it should still be much better given the yields are awful but the last time this came up someone pointed this out IME

There's no way those numbers can be using FinFLEX to the maximum extent possible, given that it covers a range of 22% speed and 18% power.

 

[Ajay]

Since it uses fewer EUV layers per wafer pricing will almost certainly make up for the reduced density so the per chip pricing is likely better. And that's before you take the whole yield issue into account, which Apple didn't due to TSMC's KGD pricing. Now that we can see exactly how bad N3B is, it does kinda look like TSMC basically bribed Apple to use N3B so they wouldn't be in a position where they went a whole year after announcing the start of N3 mass production before they had any actual N3 wafer starts!

I think you nailed it there. I'd guess that N5 is cheaper than N3E, but less so (if it were a real node) than N3B. So a stumble for TSMC, but plan b looks good.

 

[SpudLobby]

I think you nailed it there. I'd guess that N5 is cheaper than N3E, but less so (if it were a real node) than N3B. So a stumble for TSMC, but plan b looks good.

Well he doesn't get a ton of credit on this considering his hesitance to something so obvious two months ago. Obviously N3E uses fewer EUV layers and has better parametric yields - that's the whole reason it's been speculated Apple wanted to move over ASAP. But yes.