Are AMD cpus true octo-cores?

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Zucker2k

Golden Member
Feb 15, 2006
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What is full core ??

Actually, what is a Core ?? How do we define a Core ??
Good question! Another question is: What is a half core? Just because a core is weakened by sharing resources with another, doesn't mean it's not a core. It's simple; a shared fp weakened BD's integer cores. This does not change them from a core, a full core, to half cores! What's a half core, anyway? A core that is only capable of half it's potential? Really? Is it really that? So were BD equipped with a theoretical 512bit or 256bit+256bit capable fp, then those half integer cores would have been magically transformed into "full cores."? Implying that they can now stretch their legs so they are now worthy of the elusive status of "full cores."?

Cores traditionally refer to integer cores.
 

myocardia

Diamond Member
Jun 21, 2003
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Good question! Another question is: What is a half core? Just because a core is weakened by sharing resources with another, doesn't mean it's not a core. It's simple; a shared fp weakened BD's integer cores. This does not change them from a core, a full core, to half cores! What's a half core, anyway? A core that is only capable of half it's potential? Really? Is it really that? So were BD equipped with a theoretical 512bit or 256bit+256bit capable fp, then those half integer cores would have been magically transformed into "full cores."? Implying that they can now stretch their legs so they are now worthy of the elusive status of "full cores."?

Cores traditionally refer to integer cores.

Using your definition here, the 3770k should obviously be described as an octo-core, since it does the work of 8 of AMD's cores, the vast majority of the time, and sometimes does even more than that. So, going by your post, we all agree that the 4 core 8350 is an octo-core, and the 4 core 3770k is an octo-core, if not deca-core, right?
 

Exophase

Diamond Member
Apr 19, 2012
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It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.

BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.
 

mrle

Member
Mar 27, 2009
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I'd say a "core" by definition would have to be an independent unit, capable of functioning as a cpu on its own. Bulldozer has 4 such units. As Exophase said, its two "integer cores" (didn't they call it "integer clusters" when BD was introduced?) are only a part of the cpu pipeline and they cannot function as a x86 cpu on their own. In effect, it's pretty similar to Intel's implementation, only with more duplicated resources.
 

myocardia

Diamond Member
Jun 21, 2003
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It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.

Yes, and this is why the quad-core 8_00 AMD FX's shouldn't be called anything other than what they are, a quad-core.

BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.

Haha, what a delightful way to describe it all. I agree that AMD's way is better. I honestly wish Intel had thought of it. I'd love to own a CMT processor, that had been designed using the Intel architecture, and their superior process tech and engineering budget. I think it would be the best of both worlds, although I may be wrong about that. Intel may very well have considered it, and chose not to pursue it, because of its inefficiencies. I'm sure we'll never know, though.

edit: I'd even love to see what the Vishera's could pull off, efficiency-wise, if they were manufactured in one of Intel's 22nm fabs. I have the feeling that they would gain quite a bit in the efficiency department, from that alone.

I'd say a "core" by definition would have to be an independent unit, capable of functioning as a cpu on its own. Bulldozer has 4 such units. As Exophase said, its two "integer cores" (didn't they call it "integer clusters" when BD was introduced?) are only a part of the cpu pipeline and they cannot function as a x86 cpu on their own. In effect, it's pretty similar to Intel's implementation, only with more duplicated resources.

I agree with this wholeheartedly. If it can't be put onto a die and used as a completely independent means of running both an OS and software, it's very obviously not a core.
 
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Charles Kozierok

Elite Member
May 14, 2012
6,762
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It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.

Yep, tis true, we haven't even been talking about that, and it's actually more important. Pretty much puts a nail in any idea that these are in any way equivalent to real cores. In fact, you could argue that a Bulldozer module is more similar to one very wide core than two independent ones.

BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.

LOL. You, sir, have just earned a place in my signature for a while. (Unless you don't want me to, in which case just PM me.)

I think it's important to recognize that these issues not only will not be resolved any time soon, they likely will not be resolved ever. People have been arguing over what a "pixel" is for years and years and still don't agree.

I think we're going to see more of this, too, because "core" is the new "MHz". IMO there's a lot of marketing in the Bulldozer module design, not just engineering.
 
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Idontcare

Elite Member
Oct 10, 1999
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It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.

BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.

I was under the impression that SUN's Niagara microarchitecture was very much a CMT design the preceded AMD's bulldozer.
 

Zucker2k

Golden Member
Feb 15, 2006
1,810
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Using your definition here, the 3770k should obviously be described as an octo-core, since it does the work of 8 of AMD's cores, the vast majority of the time, and sometimes does even more than that. So, going by your post, we all agree that the 4 core 8350 is an octo-core, and the 4 core 3770k is an octo-core, if not deca-core, right?
The 8350 has 8 physical cores. It is disingenuous to argue that a core can become a 'super core,' a 'regular core,' or 'half of a core' based on increasing, decreasing, or sharing components. What is "half a core," anyway? Someone please answer this question.
The 3770k has 4 physical, and 4 virtual cores. HT essentially is just a way to trick the OS into maximizing the processing power of the cpu, in that cycles that would otherwise be wasted are used to process data spawned by the OS on the 'phantom' cores. In this regard, it enhances the efficiency, ie. performance and power consumption of the cpu. That's all.
 

Hubb1e

Senior member
Aug 25, 2011
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On AMD there are 8 integer pipelines and 4 256 bit floating point pipelines and each can operate on TWO 128 bit floating point operations at once. So, the CPU can operate on 8 integer threads at the same time, AND 8 128 bit floating point operations at the same time. So yes, this is very close to an 8 core CPU with some shared front end hardware. It's closer to true 8 cores than hyperthreading. People say hyperthreading allows it to run 8 threads at the same time, but that is not really true. It can juggle 8 threads at the same time to optimize flow through the CPU, but only 4 are being executed at the same time.

Still, Intel's 4 core chips are still faster than AMD's 8 core chips in most workloads where they often win by a considerable margin.
 

Exophase

Diamond Member
Apr 19, 2012
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I was under the impression that SUN's Niagara microarchitecture was very much a CMT design the preceded AMD's bulldozer.

That stood for "chip multithreading" which just referred to a multicore chip with multithreading. AMD's stands for "clustered multithreading." Outside of both referring to some kind of multithreading the two have no further similarities.

Sun's threading wan't horizontal/simultaneous (couldn't be, it's a single issue core) and the threads generally proceeded in round robin execution so long as none were stalled.
 

Idontcare

Elite Member
Oct 10, 1999
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That stood for "chip multithreading" which just referred to a multicore chip with multithreading. AMD's stands for "clustered multithreading." Outside of both referring to some kind of multithreading the two have no further similarities.

Sun's threading wan't horizontal/simultaneous (couldn't be, it's a single issue core) and the threads generally proceeded in round robin execution so long as none were stalled.

Are we talking about the same Niagara that is an 8-core integer processor with all the cores sharing a single FPU?
 

Charles Kozierok

Elite Member
May 14, 2012
6,762
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I was under the impression that SUN's Niagara microarchitecture was very much a CMT design the preceded AMD's bulldozer.

I think its closest ancestor is the Alpha 21264, which seems pretty similar, at least superficially. I'm not sure if it actually issued from separate threads, though -- this is quite a few years ago now.



On AMD there are 8 integer pipelines and 4 256 bit floating point pipelines and each can operate on TWO 128 bit floating point operations at once. So, the CPU can operate on 8 integer threads at the same time, AND 8 128 bit floating point operations at the same time.

I'm pretty sure Intel's FPU/SIMD units have been 256 bits wide since at least SB, so I'm not sure how that really changes things.

People say hyperthreading allows it to run 8 threads at the same time, but that is not really true. It can juggle 8 threads at the same time to optimize flow through the CPU, but only 4 are being executed at the same time.
There's no juggling. HT takes advantage of unused EU slots and fills them.

That stood for "chip multithreading" which just referred to a multicore chip with multithreading. AMD's stands for "clustered multithreading." Outside of both referring to some kind of multithreading the two have no further similarities.

I detest the term "chip multithreading" because it is so very vague. Basically, anything other than a plain Jane single core is doing some form of "chip multithreading". It encompasses everything, which makes it not terribly illustrative.
 

Exophase

Diamond Member
Apr 19, 2012
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Are we talking about the same Niagara that is an 8-core integer processor with all the cores sharing a single FPU?

Yes. That's more of a coincidence than both following the same design methodology. AMD shares the FPUs in the module to improve utilization, it's basically a form of SMT. Sun throws in a token FPU just to avoid having to trap and emulate the instructions. AMD still intends to run code where the FPU is important for performance, Sun very much doesn't.
 

myocardia

Diamond Member
Jun 21, 2003
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The 8350 has 8 physical cores. It is disingenuous to argue that a core can become a 'super core,' a 'regular core,' or 'half of a core' based on increasing, decreasing, or sharing components. What is "half a core," anyway? Someone please answer this question.

No, it doesn't. The only being disingenuous here is you. A processor core can run a full operating system, along with software. Not one of the "8 cores" of any 8350 on the planet can do that. Not a single one. Strawman much? BTW, "half a core" is one that some fan claims exists, that magically can't do what an actual core can do, i.e. run an operating system, completely unassisted, while also running software, completely unassisted.

The 3770k has 4 physical, and 4 virtual cores. HT essentially is just a way to trick the OS into maximizing the processing power of the cpu, in that cycles that would otherwise be wasted are used to process data spawned by the OS on the 'phantom' cores. In this regard, it enhances the efficiency, ie. performance and power consumption of the cpu. That's all.

And yet, although AMD's approach to the exact same thing, while using slightly more hardware to do so, is now somehow magically different? There's a reason why it's always new posters spewing such nonsense, I'm afraid.
 

podspi

Golden Member
Jan 11, 2011
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Using your definition here, the 3770k should obviously be described as an octo-core, since it does the work of 8 of AMD's cores, the vast majority of the time, and sometimes does even more than that. So, going by your post, we all agree that the 4 core 8350 is an octo-core, and the 4 core 3770k is an octo-core, if not deca-core, right?

No, it doesn't. The only being disingenuous here is you. A processor core can run a full operating system, along with software. Not one of the "8 cores" of any 8350 on the planet can do that. Not a single one. Strawman much? BTW, "half a core" is one that some fan claims exists, that magically can't do what an actual core can do, i.e. run an operating system, completely unassisted, while also running software, completely unassisted.



And yet, although AMD's approach to the exact same thing, while using slightly more hardware to do so, is now somehow magically different? There's a reason why it's always new posters spewing such nonsense, I'm afraid.

His point was that performance is irrelevant (my Atom is a dual-core, even though it is much slower than a single Ivy Bridge core).

Also, you could make the claim that any modern core could not run an operating system on its own if you took away all shared components, Bulldozer and Piledriver are not unique in that sense. What you can do is disable 7 out of 8 cores on an 8350 and still boot windows. You can't do that on a 3770k
 

Exophase

Diamond Member
Apr 19, 2012
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Also, you could make the claim that any modern core could not run an operating system on its own if you took away all shared components, Bulldozer and Piledriver are not unique in that sense. What you can do is disable 7 out of 8 cores on an 8350 and still boot windows. You can't do that on a 3770k

What are you saying exactly? You can disable HT on Intel CPUs or use one that already has it fused off like desktop i5s. Then you can disable all but one cores. How is this different from your scenario?

No, you can't split an HT core into two separate independent cores anymore than you could split an AMD module. The difference is, no one says 3770K and the like have eight cores.
 

Idontcare

Elite Member
Oct 10, 1999
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Yes. That's more of a coincidence than both following the same design methodology. AMD shares the FPUs in the module to improve utilization, it's basically a form of SMT. Sun throws in a token FPU just to avoid having to trap and emulate the instructions. AMD still intends to run code where the FPU is important for performance, Sun very much doesn't.
That was true of the T1, but the T2 (which preceded Bulldozer by many years) was not like that at all.

Two integer ALUs per core instead of one, each one being shared by a group of four threads
One floating point unit per core, up from just one FPU for the entire chip
 

AtenRa

Lifer
Feb 2, 2009
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No, it doesn't. The only being disingenuous here is you. A processor core can run a full operating system, along with software. Not one of the "8 cores" of any 8350 on the planet can do that. Not a single one. Strawman much? BTW, "half a core" is one that some fan claims exists, that magically can't do what an actual core can do, i.e. run an operating system, completely unassisted, while also running software, completely unassisted.

Yes it can, you can use a single core within the Module.

http://atenra. blog .com/2012/02/01/amd's-bulldozer-cmt-scaling/
 

Zucker2k

Golden Member
Feb 15, 2006
1,810
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And yet, although AMD's approach to the exact same thing, while using slightly more hardware to do so, is now somehow magically different? There's a reason why it's always new posters spewing such nonsense, I'm afraid.
It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."
 

ShintaiDK

Lifer
Apr 22, 2012
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It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."

They adopted MCM after spending endless millions in PR discrediting it.
 

mrle

Member
Mar 27, 2009
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Current architectures are really a gold mine for "moar coars marketing" because of the level of parallelism in the cpu pipelines.

Let's consider the original Pentium, released 20 years ago. It has two ALUs. Can do two instructions at the same time. I'd say by today's marketing standards, its only fair to call it a dual core.
 

Exophase

Diamond Member
Apr 19, 2012
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That was true of the T1, but the T2 (which preceded Bulldozer by many years) was not like that at all.

Yes, the T2 was closer to a conventional execution unit arrangement with SMT, albeit with no parallelism between the same threads to simplify scheduling; it was even less like Bulldozer than T1. There's a big difference between two integer ALUs + 1 FPU (and 1 MEM) and two integer cores (as AMD calls them) + 1 FPU. The two integer parts in a BD module have totally separate schedulers, L1 dcache, L1 TLB, in addition to ALUs and AGUs. The two separate threads aren't don't execute pipelined over the same execution units.
 
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myocardia

Diamond Member
Jun 21, 2003
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It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."

But that's where you're 100% wrong. It's *nearly* the identical thing, just implemented slightly differently, by using more hardware in AMD's case. I actually like AMD's approach better, don't get me wrong, but they are nothing more than two different ways to flip the same coin. And if your point was that the AMD FX's are closer to an actual octo-core than a 3770k, that I would have to agree with.

edit: But, as they stand today, neither are actual octo-cores, even though the AMD chips are in fact closer than their Intel counterparts.
 
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