AtenRa
Lifer
- Feb 2, 2009
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but the AMD cores aren't full cores either
What is full core ??
Actually, what is a Core ?? How do we define a Core ??
but the AMD cores aren't full cores either
Good question! Another question is: What is a half core? Just because a core is weakened by sharing resources with another, doesn't mean it's not a core. It's simple; a shared fp weakened BD's integer cores. This does not change them from a core, a full core, to half cores! What's a half core, anyway? A core that is only capable of half it's potential? Really? Is it really that? So were BD equipped with a theoretical 512bit or 256bit+256bit capable fp, then those half integer cores would have been magically transformed into "full cores."? Implying that they can now stretch their legs so they are now worthy of the elusive status of "full cores."?What is full core ??
Actually, what is a Core ?? How do we define a Core ??
Good question! Another question is: What is a half core? Just because a core is weakened by sharing resources with another, doesn't mean it's not a core. It's simple; a shared fp weakened BD's integer cores. This does not change them from a core, a full core, to half cores! What's a half core, anyway? A core that is only capable of half it's potential? Really? Is it really that? So were BD equipped with a theoretical 512bit or 256bit+256bit capable fp, then those half integer cores would have been magically transformed into "full cores."? Implying that they can now stretch their legs so they are now worthy of the elusive status of "full cores."?
Cores traditionally refer to integer cores.
It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.
BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.
I'd say a "core" by definition would have to be an independent unit, capable of functioning as a cpu on its own. Bulldozer has 4 such units. As Exophase said, its two "integer cores" (didn't they call it "integer clusters" when BD was introduced?) are only a part of the cpu pipeline and they cannot function as a x86 cpu on their own. In effect, it's pretty similar to Intel's implementation, only with more duplicated resources.
It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.
BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.
It seems a lot of people think that only the FPUs are shared. The entire front end is too. Branch prediction, L1 instruction cache, L1 ITLB, fetch buffers, and decode are all shared. These are pretty critical parts of a core. There's also the L2 cache, although that's commonly shared in other designs.
BD is the first to ever use a design remotely like this, so you can't fall back on traditional examples of things that were or weren't a core. If two traditional cores are like normal identical twins CMT is like conjoined twins, and traditional SMT is like a person with multiple personality disorder.
The 8350 has 8 physical cores. It is disingenuous to argue that a core can become a 'super core,' a 'regular core,' or 'half of a core' based on increasing, decreasing, or sharing components. What is "half a core," anyway? Someone please answer this question.Using your definition here, the 3770k should obviously be described as an octo-core, since it does the work of 8 of AMD's cores, the vast majority of the time, and sometimes does even more than that. So, going by your post, we all agree that the 4 core 8350 is an octo-core, and the 4 core 3770k is an octo-core, if not deca-core, right?
I was under the impression that SUN's Niagara microarchitecture was very much a CMT design the preceded AMD's bulldozer.
That stood for "chip multithreading" which just referred to a multicore chip with multithreading. AMD's stands for "clustered multithreading." Outside of both referring to some kind of multithreading the two have no further similarities.
Sun's threading wan't horizontal/simultaneous (couldn't be, it's a single issue core) and the threads generally proceeded in round robin execution so long as none were stalled.
I was under the impression that SUN's Niagara microarchitecture was very much a CMT design the preceded AMD's bulldozer.
On AMD there are 8 integer pipelines and 4 256 bit floating point pipelines and each can operate on TWO 128 bit floating point operations at once. So, the CPU can operate on 8 integer threads at the same time, AND 8 128 bit floating point operations at the same time.
There's no juggling. HT takes advantage of unused EU slots and fills them.People say hyperthreading allows it to run 8 threads at the same time, but that is not really true. It can juggle 8 threads at the same time to optimize flow through the CPU, but only 4 are being executed at the same time.
That stood for "chip multithreading" which just referred to a multicore chip with multithreading. AMD's stands for "clustered multithreading." Outside of both referring to some kind of multithreading the two have no further similarities.
Are we talking about the same Niagara that is an 8-core integer processor with all the cores sharing a single FPU?
The 8350 has 8 physical cores. It is disingenuous to argue that a core can become a 'super core,' a 'regular core,' or 'half of a core' based on increasing, decreasing, or sharing components. What is "half a core," anyway? Someone please answer this question.
The 3770k has 4 physical, and 4 virtual cores. HT essentially is just a way to trick the OS into maximizing the processing power of the cpu, in that cycles that would otherwise be wasted are used to process data spawned by the OS on the 'phantom' cores. In this regard, it enhances the efficiency, ie. performance and power consumption of the cpu. That's all.
Using your definition here, the 3770k should obviously be described as an octo-core, since it does the work of 8 of AMD's cores, the vast majority of the time, and sometimes does even more than that. So, going by your post, we all agree that the 4 core 8350 is an octo-core, and the 4 core 3770k is an octo-core, if not deca-core, right?
No, it doesn't. The only being disingenuous here is you. A processor core can run a full operating system, along with software. Not one of the "8 cores" of any 8350 on the planet can do that. Not a single one. Strawman much? BTW, "half a core" is one that some fan claims exists, that magically can't do what an actual core can do, i.e. run an operating system, completely unassisted, while also running software, completely unassisted.
And yet, although AMD's approach to the exact same thing, while using slightly more hardware to do so, is now somehow magically different? There's a reason why it's always new posters spewing such nonsense, I'm afraid.
Also, you could make the claim that any modern core could not run an operating system on its own if you took away all shared components, Bulldozer and Piledriver are not unique in that sense. What you can do is disable 7 out of 8 cores on an 8350 and still boot windows. You can't do that on a 3770k
That was true of the T1, but the T2 (which preceded Bulldozer by many years) was not like that at all.Yes. That's more of a coincidence than both following the same design methodology. AMD shares the FPUs in the module to improve utilization, it's basically a form of SMT. Sun throws in a token FPU just to avoid having to trap and emulate the instructions. AMD still intends to run code where the FPU is important for performance, Sun very much doesn't.
Two integer ALUs per core instead of one, each one being shared by a group of four threads
One floating point unit per core, up from just one FPU for the entire chip
No, it doesn't. The only being disingenuous here is you. A processor core can run a full operating system, along with software. Not one of the "8 cores" of any 8350 on the planet can do that. Not a single one. Strawman much? BTW, "half a core" is one that some fan claims exists, that magically can't do what an actual core can do, i.e. run an operating system, completely unassisted, while also running software, completely unassisted.
It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."And yet, although AMD's approach to the exact same thing, while using slightly more hardware to do so, is now somehow magically different? There's a reason why it's always new posters spewing such nonsense, I'm afraid.
It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."
That was true of the T1, but the T2 (which preceded Bulldozer by many years) was not like that at all.
It is not the "exact same thing"! HT could very well be implemented on top of CMT should AMD choose to go that route. Somehow, I doubt they would though; remember, "Real men use real cores."