asus maximus V formular/gene high power off consumption

[dispat0r]

Hello,
I have a little Problem with these two Asus boards.
If I power off the machines they are each pulling 12W from the wall.
I have activated ErP in the bios and disabled all LEDs but the power consumption is the same.
Is there anyway to lower this ?
My old AMD system with a CROSSHAIR V FORMULA pulled only < 3W and the suspend to ram power consumption was also lower with the same count of ram modules.
The idle/load power usage is fine ~50W/130W for the small system.
P.S. I use the latest bios for both boards but it also happend before the update

Here are the specifications of the small machine:

PSU: Seasonic Platinum Fanless 520W
Motherboard: Asus Maximus V Gene
CPU: i7-3770K
HDD: 256GB Samsung SSD 840 PRO/ 2 3TB WD30EURS

 

[suteck]

In your motherboard suite you should have something known as an "ASUS EPU"Have you tried installing this and using it. It's works really well in most cases. You should give this a try.

 

[dispat0r]

thx, for the tip.
I only tried the BIOS EPU settings for power off (S5) but without effect.
I'm using Linux so no AI Suite but I have an old windows installation to try the AI Suite EPU stuff but I don't think this will help the EPU stuff seems only to effect power consumption at runtime...

 

[suteck]

What about the bios C3, C6 and C7 states? Are they enabled? That might help.

 

[dispat0r]

All settings on Auto but the CPU C states also shouldn't affect S5 power consumption...
But my CPU is atleast using up to C6. Which settings exactly activate C7 ?

 

[suteck]

C7 is just a deeper sleep state so your CPU can save some more power when idle. Sandy Bridge CPUs support C7 as long as your bios turns this feature on. I think the power savings was minimal so many manufacturers don't bother enabling C7. If you click on the C1/C3/C6 button in ThrottleStop 4.10, (FOUND HERE), it will open up a window and show you what percentage of time your CPU is spending in each C state. This data constantly varies as the CPU's cores and threads rapidly enter and exit various C states.

The Intel Datasheet explains C7 but you might need an advanced degree in nuclear physics or rocket science to fully comprehend what is written.

2nd Generation Intel® Core™ Processor Family Mobile, and Intel® Celeron® Processor Family Mobile
Datasheet, Volume 1

4.2.4.5 Core C7 State

Individual threads of a core can enter the C7 state by initiating a P_LVL4 I/O read to
the P_BLK or by an MWAIT(C7) instruction. The core C7 state exhibits the same
behavior as the core C6 state unless the core is the last one in the package to enter the
C7 state. If it is, that core is responsible for flushing L3 cache ways. The processor
supports the C7s substate. When an MWAIT(C7) command is issued with a C7s
sub-state hint, the entire L3 cache is flushed in one step as opposed to flushing the L3
cache in multiple steps.

4.2.5.5 Package C7 State

The processor enters the package C7 low power state when all cores are in the C7 state and the L3 cache is completely flushed. The last core to enter the C7 state begins to shrink the L3 cache by N-ways until the entire L3 cache has been emptied. This allows further power savings.
Core break events are handled the same way as in package C3 or C6. However, snoops are not sent to the processor in package C7 state because the platform, by granting the package C7 state, has acknowledged that the processor possesses no snoopable information. This allows the processor to remain in this low power state and maximize its power savings.
Upon exit of the package C7 state, the L3 cache is not immediately re-enabled. It re-enables once the processor has stayed out of C6 or C7 for an preset amount of time. Power is saved since this prevents the L3 cache from being re-populated only to be immediately flushed again.

 

[x2ezx]

Got the same board and processor, and pulled 11 watts.