Athlon L2 cache bandwidth.

[FastD]

I was just wondering why AMD won't make the bus 256 bits wide like intel has in the p3 and p4, instead of the 64 bits wide bus that they are using in the current Athlon processor. I think this could help performance quite a lot. Especially in streaming media apps and that is where the Athlon needs more muscle to be able to compete with the p4 in the future. And AMD is about to release a new Athlon core. So....

Is it because it is very hard to implement or because AMD doesn't feel that it is needed?

/patrik

 

[Abomination]

Well let's see, the p4 sux and the p3 is about as good as the athlon (if that good) so maybe it really doesn't make a difference

 

[DaddyG]

AMD has answered this question. Since the Athlon has a larger L1 cache, the higher bandwidth to L2 is not required, more hits are comming from L1.