It should take A LOT of pressure to crack the die if the pressure is evenly distributed.
I see. So with this method we are applying quite a bit more than possible with springs but still pretty safe for the die?
It should take A LOT of pressure to crack the die if the pressure is evenly distributed.
I see. So with this method we are applying quite a bit more than possible with springs but still pretty safe for the die?
I see. So with this method we are applying quite a bit more than possible with springs but still pretty safe for the die?
4.5 with delid? Dang.
The pins in the socket basically act like one big cushioning spring-mattress as you increase the pressure on the CPU die. Until it bottoms out of course, then you could have some problems.
I think it is telling though that there haven't been an outcry of enthusiasts cracking their delidded CPUs. Plenty of people report killing their chips during delidding if they cut through the PCB in the wrong area by accident, but nothing about cracking the silicon during the bare-die mounting or relidding with the IHS in which case the IHS rests on the bare-die all the same.
5.2? On what N2? Its sounds super high even for SB.Would it be fair to say that the average OC ceiling has come down slightly twice in a row now? Seems like 5.2 on SB was often attainable, which makes the average ultimate OC performance delta between SB and HSW pretty small.
Would it be fair to say that the average OC ceiling has come down slightly twice in a row now? Seems like 5.2 on SB was often attainable, which makes the average ultimate OC performance delta between SB and HSW pretty small.
If you are ballathefearedD) 5.5GHz is easy on SB on AIR and 4.8GHz is also easy on HW also on AIRI don't know about 5.2, but 5.0 seemed to be within reach for most enthusiasts who were willing to lap their 2600k (or 2700k) and combine it with some high-end air or water (lapped as well).
Thanks for your assessment. 200MHz lower per refresh sounds more realistic than the guesstimates I've been throwing around.I don't know about 5.2, but 5.0 seemed to be within reach for most enthusiasts who were willing to lap their 2600k (or 2700k) and combine it with some high-end air or water (lapped as well).
3770k definitely saw the distribution shift down a good 200 MHz, and it does appear from early reports that the 4770k brings a distribution that shifts down another 200MHz more.
Could be that 32nm was just way over-designed and Intel left a lot of untapped potential on the table by releasing such low-clocked SKUs. Could be that 22nm is right on target and it (the process node) was better managed to maximize having lower power numbers while delivering the targeted clockspeeds (so it intentionally left less OC headroom on the table, unlike 32nm).
Regardless how or why, it kinda makes it all a rather smoothed over snoozefest where the enthusiast has now had their choice of three successive chips which more or less deliver roughly the same performance and power consumption when fully maxed out in terms of high-end clockspeeds.
Hopefully 14nm brings something new to the table. 5.5GHz on air would be a welcome surprise, but non-socketed chips would not be great. (who can delid or lap that?)
I think this architecture is done. Forget 5.5ghz. We need to start low again like C2D ,where the clocks drop back down to 2.0-2.4ghz, but have a huge 60% or greater IPC improvement. Then we can once again make our way back up to 5ghz from there.
I think this architecture is done. Forget 5.5ghz. We need to start low again like C2D ,where the clocks drop back down to 2.0-2.4ghz, but have a huge 60% or greater IPC improvement. Then we can once again make our way back up to 5ghz from there.
How do you get the adhesive off the PCB? I've been practicing delidding with some old Opterons using the hammer and vice technique. Delidding those has been pretty simple, but the adhesive on the PCB... I don't want to use a razor blade on the PCB and risk scratching it. Is there something that will dissolve it and not anything else, like alcohol or acetone?
I know it isn't popular to talk about it, but that is basically what an Itanium-like microarchitecture would do. Double or quadruple the width, drop the clockspeeds so power stays reasonable, and get the compilers to do more work for you.
Don't forget his 470s @ 1.21JigaHertzIf you are ballathefearedD) 5.5GHz is easy on SB on AIR and 4.8GHz is also easy on HW also on AIR
How do you get the adhesive off the PCB? I've been practicing delidding with some old Opterons using the hammer and vice technique. Delidding those has been pretty simple, but the adhesive on the PCB... I don't want to use a razor blade on the PCB and risk scratching it. Is there something that will dissolve it and not anything else, like alcohol or acetone?
When do you think they'll roll that in. It can't come soon enough IMHO.
As promised:
You would think it would be easier to put the offset washers under the springs but in the case of the current gen Corsair waterblocks, the spring post is oddly shaped and not very easy to find washers that would fit.
His method allows the slack to be taken up while using all the stock hardware, but makes the backplate non-functional.
One win, one loss. As long as the mobo does not flex excessively with his method, it's an easy and clean looking way to achieve the goal.