Bare-die testing: A delidded 3770k, an H100, and 9 different TIMs

[jj109]

Updated:
http://www.overclock.net/t/1313179/official-delidded-club-guide/28720#post_24315821

15 year old and discontinued Dow Corning paste works just as well as NT-H1 but doesn't pump out.

 

[iunlock]

Very interesting point. It could very well be. There has to be some kind of tolerance of some kind of how much pressure it applies, unless they have some pressure metering gauge that can adjust the pressure of each IHS that it presses individually. I highly doubt it though.

 

[crashtech]

The main point to keep in mind is that on the typical delid/relid application, the TIM on the die is under greater pressure than the TIM on the IHS, due to the difference in surface area. The die is also under greater pressure due to the CPU retention method in most instances, since the design of the LGA socket is such that, in a delidd/relid application, the force required to positively engage all 1150+ lands is transferred through the IHS solely through the die and then to the PCB and CPU pads. A non-delidded application has the sealant around the perimeter of the IHS to help distribute the load.

 

[Idontcare]

The main point to keep in mind is that on the typical delid/relid application, the TIM on the die is under greater pressure than the TIM on the IHS, due to the difference in surface area. The die is also under greater pressure due to the CPU retention method in most instances, since the design of the LGA socket is such that, in a delidd/relid application, the force required to positively engage all 1150+ lands is transferred through the IHS solely through the die and then to the PCB and CPU pads. A non-delidded application has the sealant around the perimeter of the IHS to help distribute the load.

I'm with crashtech and his hypothesis regarding the observations of pumpout with bare-die applications versus IHS-to-HSF applications.

 

[crashtech]

I'm with crashtech and his hypothesis regarding the observations of pumpout with bare-die applications versus IHS-to-HSF applications.

Thanks for the vote of confidence, coming from you, it means a lot. I've been thinking about how to relid a CPU in a way that would result in precisely the right pressure being exerted on the die, but there are a few problems :
Bulk modulus of the original IHS sealant, its surface area, the original gap between die and IHS, and the amount of pressure applied by the CPU retention and HSF mechanisms need to be known in order to calculate how much load was borne by the sealant. The bulk modulus of any replacement sealant must be known, and an application method devised which results in an applied surface area that falls within certain parameters.

Given all the variables, my new hypothesis is that Intel designed their non-soldered CPUs so that the sealant bears all the load, and while the pressure of installing the CPU and HSF might decrease the die to IHS gap, it never gets to the point of being load bearing.

 

[Idontcare]

Thanks for the vote of confidence, coming from you, it means a lot. I've been thinking about how to relid a CPU in a way that would result in precisely the right pressure being exerted on the die, but there are a few problems :
Bulk modulus of the original IHS sealant, its surface area, the original gap between die and IHS, and the amount of pressure applied by the CPU retention and HSF mechanisms need to be known in order to calculate how much load was borne by the sealant. The bulk modulus of any replacement sealant must be known, and an application method devised which results in an applied surface area that falls within certain parameters.

Given all the variables, my new hypothesis is that Intel designed their non-soldered CPUs so that the sealant bears all the load, and while the pressure of installing the CPU and HSF might decrease the die to IHS gap, it never gets to the point of being load bearing.

I agree, on the non-soldered IHS SKUs the CPU itself is mechanically isolated and experiences negligible load-bearing forces.

Getting back to the consequences portion of the discussion, what does this mean for Intel's IHS-less mobile SKUs? What TIM do the OEMs use in countering the higher mounting pressure from the reduced surface area in the bare-die mounted mobile form factors?

They must do something. Maybe reduced mounting pressure of the cooler itself to keep things pressure-normalized at the die surface?

edit: oh, and one way to test your theory is to setup a test rig with bare-die mounted HSF using a TIM known for pumpout effects (e.g. NT-H1), characterize the pumpout curve quantitatively. Then reset the same hardware for a test in which the mounting pressure is intentionally reduced or lessened. I could imagine doing this by way of shimming the standoffs with very thin washers (or non-metallic washers made of a compressible material such as paper). If the silicon-die surface area mounting pressure is the culprit for pumpout then you should see a lessened pump-out effect. In fact you should be able to systematically reduce the mount pressure such that eventually the bare-die mount pressure is comparable to that of the HSF-to-IHS mount pressure and observe no pumpout effects.

 

[know of fence]

Difference (i.e., mismatch) between the two different materials making the interface where the TIM goes?

I could see where you have the heat spreader still in place, it's a metal similar to your heatsink, so they expand/contract at similar rates.

But when you go bareback, the bare silicon die might expand/contract differently than the metal heatsink, so you get enhanced pumping effect?

Just speculation...

The same force applied by the compressed mounting springs to an area that is roughly 1/5th (when compring IHS mm² to die mm²) should result in 5 times the mouning pressure, right? Five times is a big change that may increase pump out but it can't be the cause.

It's safe to assume that mounting pressure is fairly constant, but the cumulative pump out effect is caused by a parameter that is clearly temperature dependant, such as viscocity(T), expansion(T), drying out(T) or some kind of shear stress(T) caused by the mismatch of surface expansion.

Also it's a bit of common sense that a smaller stripe shaped surface, should require a more viscous grease, to avoid any kind of leak. Whereas a big square application can benefit from more liquid TIM to ensure even distribution, relying on capillary force to keep it in place. 5 Times the area also means 5 times the force that keeps it snug together.

 

[LordSilver]

For a notebook (which has both cpu and gpu dies exposed) is it better to spread the TIM manually or to put a line and let the heatsink do the job? I'm going to use NT-H1.

 

[crashtech]

Dot for square dice and line for rectangles is the best way. Spreading it can end up trapping air pockets, which will make the installation less conductive.

 

[LordSilver]

Is the NT-H1 pumping-out effect so bad in the long term? I would like to avoid replacing TIM for some years. Maybe I should get AS Céramique 2 (provided that it performs as good as/better than previous Céramique) or the above-mentioned Dow TC-5026?

 

[DrMrLordX]

Ceramique 2 looks like it should do well as a replacement for OEM TIM:

Taken from:

http://skinneelabs.com/arctic-silver-5-and-ceramique-review/

 

[LordSilver]

Ceramique 2 looks like it should do well as a replacement for OEM TIM:

Taken from:

http://skinneelabs.com/arctic-silver-5-and-ceramique-review/

Are those tests on bare silicon? I doubt it. It's really a pity GC-Extreme hasn't been tested in this thread.

Anyway, I still have to see a proof of NT-H1 performance drop over time.

 

[DrMrLordX]

Are those tests on bare silicon? I doubt it. It's really a pity GC-Extreme hasn't been tested in this thread.

No, it isn't, not that the underlying material matters wrt heat transfer properties, except maybe in the circumstance that a particular paste is gaining an advantage for its ability to fill microfissures in the contact surfaces better than another. That's a pretty niche argument.

In general, the paste that tests best between any given pair of surfaces will test the best regardless of what other surfaces are in use (barring situations where the TIM directly or indirectly destroys a contact surface, such as CLU/CLP on aluminum). Pump-out is an issue, and I'm not sure if Ceramique 2 is going to pump out like NT-H1 or AS5. I'm not even sure if it's an issue at all in the given application for any paste.

Anyway, I still have to see a proof of NT-H1 performance drop over time.

Best anyone has is IDC's 3770k delid thread, where he documented pump-out on more than one paste. That's a fairly specific application, though. If mount pressure and orientation are different, then pump-out may simply not occur at all.

 

[crashtech]

It's not the material, it's the drastic differences in surface area and clamping forces per square area between bare die apps conventional mounts that are the problem.

 

[DrMrLordX]

Right. Clamping force is going to be a big deal when it comes to pump-out, and it might change the way particles line up which may affect TIM performance . . . or it may not. Generally-speaking, higher clamping force improves TIM performance across the board except for liquid metal TIMs thanks to smaller bondline thickness and other factors.

Surface area . . . eh. It'll make pumpout an issue, maybe, but really it's not THAT big of a deal for the paste. It's more of an issue when it comes to how a big ol copper block receives heat from a tiny dissipative surface.

 

[crashtech]

Can't leave out surface area as a main pumpout consideration, since the unit of measurement involved is:

Pressure, Force, Area.

 

[LordSilver]

So, should I be concerned about pump-out effect in the case of an heatsink which has a low clamping force? There is not such a great pressure as in huge desktop heatsinks.

 

[crashtech]

The concerns about bare die pumpout are mostly relegated to desktop delidded installations, which, due to the retention method, rely on pressure on the die not only to mount the HSF, but to ensure contact of all the (thousand plus) LGA contacts as well.

Mobile applications are a whole different story. Some mobile apps call for rather thick thermal pads, so regular TIM will not work. It all depends on what you have.

 

[LordSilver]

Mobile applications are a whole different story. Some mobile apps call for rather thick thermal pads, so regular TIM will not work. It all depends on what you have.

I added pictures so you can understand the situation more clearly. And here is the motherboard with GPU and CPU dies exposed:

Hope it helps.

 

[DrMrLordX]

I do not think pumpout will be as big an issue for you as in bare die or delid/relid applications.

 

[crashtech]

Not at all, you should proceed without worries.

 

[LordSilver]

Does it worth to spend 15 € for a 5.5g syringe of Thermal Grizzly Kryonaut?

Probably it could be even more than 1°C difference from the Noctua NT-H1, at least 3°C I would like to hope.

 

[DrMrLordX]

That stuff has shown up on the radar of the folks over at XS semi-recently. I'm not sure what behavior it exibits in delid/relid or bare-die applications.

 

[crashtech]

All the good pastes that I have heard of/used are within a couple degrees of each other. It's not going to make any discernible difference in your laptop, unless you are going for some kind of maxxed out mobile OC.

 

[jj109]

That stuff has shown up on the radar of the folks over at XS semi-recently. I'm not sure what behavior it exibits in delid/relid or bare-die applications.

I've been using kyronaut as TIM1 on my Haswell for several months and the performance has only improved.

Much better than NT-H1 on the watercooled GPU as well (8 C rise vs 10 C rise).