[bit-tech] Radeon HD 7000-series rumoured for May production

[Lepton87]

Im talking from one process to the next, from 55nm to 40nm is a half node and from 40nm to 28nm is a Full Node.

A full node shrink will allow you to ~double the transistor count and ~keep the same die size in relationship to the previous process.

GT200 at 65nm = 1.4B transistors and 575mm2
GT200B at 55nm = 1.4B transistors and 470mm2 (Half Node from 65nm)
GF100 at 40nm = 3.2B transistors and 530mm2 (Full Node from 65nm) double the transistor count same die size from 65nm. (40nm is a little bit more than full node from 65nm)

55nm to 40nm is a full node shrink, half node would be 55nm to 45nm.

 

[3DVagabond]

I think the 7970 will be as fast as 2 6950's in crossfire and have 2816 sp's. I believe it will include some cpu/gpu like features kinda like the fermi chips and with better tessalators. Core clocks around 850.

Seeing as how the 6950 is a crippled chip, I'll be surprised if the 7970 is a 2x version of it.

I do believe they'll be designed with gpgpu, dp, etc. in mind. Either that or they won't have anything to compete in that market. Fermi @ 28nm will be so much better than Cypress is that AMD might as well give up that market or just sell low end there.

 

[Lepton87]

Fermi @ 28nm will be so much better than Cypress is that AMD might as well give up that market or just sell low end there.

I'm sure it will be, but how is that relevant? Cypress has already been superseded by Cayman. Anyway, back to the specs, the transistor count seems awfully low. 3.2B? That's only 20% increase from Cayman and barely any more than Fermi.

 

[RussianSensation]

I'm suprised that nobody has called out the OP on the "5870 is more than twice as fast as 4870" comment. 4870x2 was ~ 10% faster than 5870 at launch, and in non-dx11 games is still faster to this day.

But if you look at games like Black Ops, Civ 5 and Mafia 2 I linked, the HD5870 is about 80-100% faster than a 4870. Of course, it will become more difficult to compare since HD4870 doesn't support DX11. On average I would say the 5870 is a good 70-80% faster than the 4870 (look at Dirt 2 for example).

If HD7970 is 70-80% faster than an HD5870 (or 55-65% faster than an HD6970), I doubt most people will be disappointed. That's a sizeable increase imo for a 2011 videocard.

 

[RussianSensation]

55nm to 40nm is a full node shrink, half node would be 55nm to 45nm.

Hmmm...this stuff does get confusing. A Half-node is defined as "a stopgap between two ITRS defined lithographic nodes". There are no two ITRS defined lithographic GPU nodes between 55nm and 40nm. But that's because I don't recall there to be a 45nm node for GPUs. Did they intentionally skip 45nm for GPUs?

90mm --> 65nm (full GPU node) (80nm is a half node stopgap)
65nm --> 40nm (full GPU node) (55nm is a half node stopgap)
40nm --> 28nm (full GPU node) (32nm is a half node stopgap that was scrapped)

Therefore, I assumed that going from 55nm to 40nm has to be half a node. ?

Source: http://en.wikipedia.org/wiki/Die_shrink

 

[3DVagabond]

I'm sure it will be, but how is that relevant? Cypress has already been superseded by Cayman. Anyway, back to the specs, the transistor count seems awfully low. 3.2B? That's only 20% increase from Cayman and barely any more than Fermi.

I'm not aware there are any Cayman pro cards and I thought Cayman had it's gpgpu capabilities stripped down. That's why I compared 28nm Fermi to Cypress. Maybe I'm mistaken?

 

[Idontcare]

Did they intentionally skip 45nm for GPUs?

Russian, you may have forgotten because its been a couple years now since all the threads, but TSMC's 40nm node IS their 45nm node. They "cancelled" 45nm and "moved up" 40nm...only what they actually did was just release 45nm late and relabled it "40nm".

One of their customers, Xilinx maybe, did not even realize they changed the node label and they did a press-release about their 45nm FPGA's and had to correct it afterwards when their marketing caught up with TSMC's.

Same with "28nm". It is actually the same old 32nm that TSMC has had in development for 4 yrs, but they slipped it a year and relabeled it 28nm. If you walk around inside TSMC engineering, or talk with any of their process engineers, internally they still refer to "28nm" as their 32nm node.

Marketing is great, just read Dilbert and all will be clear.

 

[cusideabelincoln]

It does if you are comparing apple-to-apples GPU architectures. But you are not, since HD6870 is a Barts architecture which is more or less the same achitectural design as Cypress (meaning VLIW-5), while HD6970 is a new architecture with VLIW-4 and 2x faster ROPs. Therefore, we would need a 256mm^2 HD6970 to compare to the HD4870 using your logic. But such card is not available. Even if AMD retains the same die size, by going to 28nm, they will be able to add more ROPs, TMUs and SPs. I don't understand why you keep coming back to AMD having to increase die size. If you think HD7000 series is a mild-refresh performance wise, how do you expect them to compete with Kepler exactly?

There is nothing invalid or illogical about comparing chips based on die size. Both the 5870 and 6870 are on the 40nm process; it doesn't matter if they are two separate marketing generations. His comparison chips of similar die size on different process nodes is meant to illustrate what kind of performance increase you can roughly estimate if you stay at a targeted die size while cramming in more transistors. Barts is kind of a best case situation since it is a more efficient version of Cypress. So if you look at the 4890 and the 6870... seems like a good analogy to me.

Personally I do not think AMD will release a chip the size of Cayman. So it will be harder to get twice the performance. How hard depends on how much smaller they go. If AMD is indeed going to implement efficiency changes in their design, they could very well use this efficiency to reduce die size - as opposed to keeping die size the same or increasing die size in the name of more performance. Nvidia could also use the same strategy. They could use design efficiencies to not make a chip as big as Fermi but still increase performance significantly.

 

[pcm81]

There is nothing invalid or illogical about comparing chips based on die size. Both the 5870 and 6870 are on the 40nm process; it doesn't matter if they are two separate marketing generations. His comparison chips of similar die size on different process nodes is meant to illustrate what kind of performance increase you can roughly estimate if you stay at a targeted die size while cramming in more transistors. Barts is kind of a best case situation since it is a more efficient version of Cypress. So if you look at the 4890 and the 6870... seems like a good analogy to me.

Personally I do not think AMD will release a chip the size of Cayman. So it will be harder to get twice the performance. How hard depends on how much smaller they go. If AMD is indeed going to implement efficiency changes in their design, they could very well use this efficiency to reduce die size - as opposed to keeping die size the same or increasing die size in the name of more performance. Nvidia could also use the same strategy. They could use design efficiencies to not make a chip as big as Fermi but still increase performance significantly.

What I wold like to see is a 7970 single GPU card with 3600 stream processors and 7990 with 2 of those gpus. ***Wishful thinking***

 

[wahdangun]

Russian, you may have forgotten because its been a couple years now since all the threads, but TSMC's 40nm node IS their 45nm node. They "cancelled" 45nm and "moved up" 40nm...only what they actually did was just release 45nm late and relabled it "40nm".

One of their customers, Xilinx maybe, did not even realize they changed the node label and they did a press-release about their 45nm FPGA's and had to correct it afterwards when their marketing caught up with TSMC's.

Same with "28nm". It is actually the same old 32nm that TSMC has had in development for 4 yrs, but they slipped it a year and relabeled it 28nm. If you walk around inside TSMC engineering, or talk with any of their process engineers, internally they still refer to "28nm" as their 32nm node.

Marketing is great, just read Dilbert and all will be clear.

wtf, so are you saying that we actually only have 45nm gpu ? And tmsc laying to use?

 

[Idontcare]

wtf, so are you saying that we actually only have 45nm gpu ? And tmsc laying to use?

TSMC can call it anything they want. 45nm, 40nm, pineapple, 2011, etc. It's just a marketing label.

Is Toyota lying to you when you buy a "2011 Prius" in Oct of 2010 or in Feb of 2012?

It doesn't matter what they call it - 45nm or 40nm - the point for us end-consumers is the actual product performance and cost.

You have, by definition, a "40nm based gpu" because TSMC gets to define what that means. They could have called it a "16nm based gpu" if they wanted and they would have broke no laws, broke no industry standards, nothing.

It would be immediate fodder for their competitors to make marketing hey-day over though, so they don't do it. Toyota can call all their cars next year "2015 models" if they like, pure marketing there too. It would break with "expectation" and that's about it, Ford's marketing dept would have field day with them if they did it though.

I remember long ago, 10yrs now, there was a Japanese company that kept trying to make press releases about their process node beating Intel to the punch. Like "we released 0.18um 6 months before Intel!"...but when you cut open their chips and measured their design rules it became obvious their "0.18um node" had about the same xtor density as everyone else's "0.25um" node.

They weren't beating Intel by 6 months, they were about 18months late. But their marketing made the most of it by just relabeling their node.

At any rate, as it happens that I am a process node development engineer I know these things and I know TSMC engineers, and yes what marketing calls "40nm" is their same old 45nm, it was delayed by about a year so they "cancelled" 45nm and released "40nm" on-time LOL. But who cares? It's just marketing.

 

[aphelion02]

Idontcare, how do Intel, GloFo, and TSMC's process nodes compare to each other on a very high level? For example, is Intel's 45nm node comparable to the 40nm in our GPUs (I realize this is vastly oversimplifying things). Would it be accurate to say that Intel is 1.5 process nodes ahead of TSMC, seeing that TSMC is still working on their "real 32nm node".?

 

[RussianSensation]

There is nothing invalid or illogical about comparing chips based on die size. His comparison chips of similar die size on different process nodes is meant to illustrate what kind of performance increase you can roughly estimate if you stay at a targeted die size while cramming in more transistors.

Except that Cayman is about 10% faster per transistor than Cypress/Barts is. So you can't estimate HD7970's performance increase over HD6970 based on how much faster HD6870 was over HD4870. Also, the PCIe 3.0 controller will likely take up more space than the current 2.1 controller. Then again AMD added dual graphics engines into Cayman. That surely took up extra space. Will they add more graphics engines? Even then we are making it too simplistic since AMD can increase transistor density by re-jiggling the GPU design to make it more efficient:

Cayman packed 23% more transistors into 16% more die size compared to Cypress, while Tessellation performance increased 1.5~3x! Simply by going to 28nm, AMD would be able increase SPs, TMUs and ROPs on their next chip. That doesn't even account for any other tricks they may have up their sleeve (recall AMD doing a re-spin of the HD4870 on the same 55nm process and they netted another 13% increase in clock speed in the HD4890). I think you guys are underestimating the jump to 28nm. It will be FAR more impressive than the 15% performance increase of HD5870 --> HD6970.

Russian, you may have forgotten because its been a couple years now since all the threads, but TSMC's 40nm node IS their 45nm node. They "cancelled" 45nm and "moved up" 40nm...only what they actually did was just release 45nm late and relabled it "40nm".

Thanks for the clarification IDC! Hopefully their 28nm process will be bulletproof unlike their 40nm fiasco.

 

[Idontcare]

Idontcare, how do Intel, GloFo, and TSMC's process nodes compare to each other on a very high level? For example, is Intel's 45nm node comparable to the 40nm in our GPUs (I realize this is vastly oversimplifying things). Would it be accurate to say that Intel is 1.5 process nodes ahead of TSMC, seeing that TSMC is still working on their "real 32nm node".?

The usual metrics for comparing process technology nodes are things like xtor Idrive, Ioff, poly pitch, metal pitch, and so on. There is an annual conference called IEDM (another one is VLSI) where this stuff gets published for comparisons.

RealWorldTech (RWT) does some really nice write-ups of IEDM.
IEDM 2007
IEDM 2008
IEDM 2010

TSMC's 40nm compares quite well to Intel's 45nm, better in some aspects (xtor density for one, making for smaller cheaper chips) and worse in others (much lower Idrive, hence lower clocks, no 40nm 3GHz monsters coming from TSMC).

Part of the reason no one really cared what TSMC called their "4X nm" node is that UMC, SMIC and Chartered were no-shows for a long time. UMC has some 45nm chips out there but it really came out late.

Their "28nm" is looking to be targeting similar parametrics as Intel's 32nm. Don't expect miracles though when it comes to Idrive (clockspeed)...TSMC has always had unflattering Idrive for as long as they've been in business.

The big question on everyone's mind is how will GloFo's 28nm HP stack up against TSMC's 28nm HP...this will be their first true head-to-head match up. Because of this, both TSMC and GloFo have been rather tight-lipped about their 28nm HP nodes.

 

[AtenRa]

Same with "28nm". It is actually the same old 32nm that TSMC has had in development for 4 yrs, but they slipped it a year and relabeled it 28nm. If you walk around inside TSMC engineering, or talk with any of their process engineers, internally they still refer to "28nm" as their 32nm node.

Marketing is great, just read Dilbert and all will be clear.

http://realworldtech.com/includes/images/articles/iedm10-10.png

Well, according to the above table there is a difference between the TSMC 32nm and 28nm process.

32nm has Gate length (Lgate) at 30 and 28nm at 24
Gate Pitch goes from 130 at 32nm to 117 for 28nm
And Cell size goes down from 0.150 at 32nm to 0.130 for 28nm

We also have difference in IDsat currents (Both in NMOS and PMOS transistors)

As you have said, TSMC always aiming at transistor density and they always have lower Idrive current than Intel's processes.

I will agree that TSMC's 28nm process Idrive is closer to Intel's 45nm but transistor density is closer to Intel's 32nm process.

Any thoughts ?

So what about the AMD 79xx series ??

From what we know, the shrink from TSMC's 40nm to 28nm will give us almost double the transistor density and higher Idrive.

That means we could have close to double the HD6970 transistor count at the same die size of 40nm with higher clocks.

 

[Idontcare]

http://realworldtech.com/includes/images/articles/iedm10-10.png

Well, according to the above table there is a difference between the TSMC 32nm and 28nm process.

32nm has Gate length (Lgate) at 30 and 28nm at 24
Gate Pitch goes from 130 at 32nm to 117 for 28nm
And Cell size goes down from 0.150 at 32nm to 0.130 for 28nm

We also have difference in IDsat currents (Both in NMOS and PMOS transistors)

You have to understand the node-development process itself is one of constant "re-spec'ing". Node specifications continually change as initial targets are brought in-line with reality, based on schedules and money.

The later these changes are made (the closer to production date) the more painful it is to have the changes fanned out and incorporated into your customer's designs, so you try and do as much of the changes up front (the first development year) as possible.

You weren't really expecting the production 2011 Chevy Volt to be identical to the 2007 concept car Chevy Volt, were you?

Pre-production node specs are no different. They are in a constant state of flux, conference proceedings merely provide a static snapshot in time.

There are targets of course, parametric commitments made to the IC designers who are busy designing their chips in parallel to the node itself being developed, but targets (design rules) change as do parametric specs.

And then you get into the issue of "developed for manufacturing"...i.e. yields. Developing the fastest xtors in the world for any given "node class" is challenging but not impossible for even the lowliest of IDM's, but doing it in a cost-effective manner (process steps, cycle time, etc) that can yield high enough to make profit is the actual challenge in this game.

 

[bryanW1995]

But if you look at games like Black Ops, Civ 5 and Mafia 2 I linked, the HD5870 is about 80-100% faster than a 4870. Of course, it will become more difficult to compare since HD4870 doesn't support DX11. On average I would say the 5870 is a good 70-80% faster than the 4870 (look at Dirt 2 for example).

If HD7970 is 70-80% faster than an HD5870 (or 55-65% faster than an HD6970), I doubt most people will be disappointed. That's a sizeable increase imo for a 2011 videocard.

I agree that +70-80% would be a success, but the +100% was clearly an exaggeration.

Hmmm...this stuff does get confusing. A Half-node is defined as "a stopgap between two ITRS defined lithographic nodes". There are no two ITRS defined lithographic GPU nodes between 55nm and 40nm. But that's because I don't recall there to be a 45nm node for GPUs. Did they intentionally skip 45nm for GPUs?

90mm --> 65nm (full GPU node) (80nm is a half node stopgap)
65nm --> 40nm (full GPU node) (55nm is a half node stopgap)
40nm --> 28nm (full GPU node) (32nm is a half node stopgap that was scrapped)

Therefore, I assumed that going from 55nm to 40nm has to be half a node. ?

Source: http://en.wikipedia.org/wiki/Die_shrink

45nm was just like 32nm in that it was there but nobody wanted to spend the money to develop it b/c there was already such a push for 40nm (and they were even struggling with that).

It is semantics when talking about steps, nodes, 1/2 steps, etc. These things are more like guidelines than rules (per IDC), and since TSMC has the current near-monopoly on gpus they can pretty much call the nodes whatever they want. However, as a general guide a full process node is typically around 70% the size of the previous node: ie 65/90 = .72, 28/40 = .70, 22/32= .69, etc. 45/65=.69, so it clearly fits that pattern and was also seen in cpu manufacturing as the logical "next step". 40/65=.62, which is quite a bit more of a jump than any other "full step" shrink in recent memory.

Here's some more of that wikipedia article that you linked:

In CPU fabrications, it is noted that a "die shrink" always involves an advance to a lithographic node as defined by ITRS (for example, 600 nm, 350 nm, 250 nm, 180 nm, 130 nm, 90 nm to 65 nm then 45 nm nodes and so on), while for GPU manufacturing, the "die shrink" usually first involves in shrink the die on a node not defined by the ITRS (for instance the 150 nm, 110 nm, 80 nm, 55 nm and more currently 40 nm nodes, sometimes referred to as "half-node") which is a stopgap between two ITRS defined lithographic nodes, and then further shrink to the lower ITRS defined nodes, this helps saving further R&D costs.


So, according to the international technology roadmap for semiconductors, 80, 55, 40, and 28 are half-nodes, regardless of what TSMC claims to the contrary. 45 and 32 are full nodes that TSMC, NV, and AMD just decided to skip. By the way, the wikipedia article doesn't explain the reasons why GPU's typically go in 1/2 step, but it's because ATI pushed them in that direction and had a pretty significant process advantage, eventually leading the industry into 1/2 steps like it is today.


edit: thanks IDC, next time I'll read ahead before responding. I still like your "Pirates" analogy the best.

 

[tijag]

I honestly think that we'll see the Graphics engines increase again.

Here is a tidbit from Ryan Smith's 6970 overview

As was the case for NVIDIA, splitting up rasterization and tessellation is not a straightforward and easy task. For AMD this meant teaching the graphics engine how to do tile-based load balancing so that the workload being spread among the graphics engines is being kept as balanced as possible. Furthermore AMD believes they have an edge on NVIDIA when it comes to design - AMD can scale the number of eraphics engines at will, whereas NVIDIA has to work within the logical confines of their GPC/SM/SP ratios. This tidbit would seem to be particularly important for future products, when AMD looks to scale beyond 2 graphics engines.

I think this hints at an area where AMD can get some pretty large efficiency gains in their next design. Since it says 'not straightforward or easy', it makes me think that they can refine this part, get improved efficiency gains, and then maybe double the engines again, so that they have a theoretical peak triangle rate of 4/clock. That would make it on par with the current Fermi arch.

 

[videoclone]

so if Nvidia shrink to 28nm also does that mean the AMD card will have the advantage

 

[Dark Shroud]

so if Nvidia shrink to 28nm also does that mean the AMD card will have the advantage

For the most part yes.

 

[OCGuy]

so if Nvidia shrink to 28nm also does that mean the AMD card will have the advantage

That depends on many things...

 

[AtenRa]

The only advantage i see is that AMD can keep the dual graphics engines (Dual tessellation Units) and double the SIMDs (2x the SP count). They will have the same performance in tessellation as 69xx but raise the DX-9/DX-10 performance and lower the Die size at 28nm.

NVIDIA will have to raise both the Tessellation engines and SP count and that will not allow them to shrink the die size and they will still have a big chip but they will have a faster tessellation performance.

 

[Idontcare]

so if Nvidia shrink to 28nm also does that mean the AMD card will have the advantage

We don't know much about Kepler to really say.

 

[LuluTheMonk]

Could somebody explain to me some model numbers, and then go into a bit of speculation?

5xxx series cards outperform equivalent 6xxx series, ie: 5850 > 6850. Having said that, I understand that the 6850 has a lower power draw, dx11, etc. But in nearly all games, raw FPS, doesn't the 5850 out perform the 6850? I wasn't following hardware at all when this occurred, so is there a link and/or cliff notes as to what happened? Is it similar to the tick/tock cycle of Intel CPU's, and the tock just happen to not outperform its predecessor?

Is the 7xxx essentially going to be a tick?

 

[RussianSensation]

5xxx series cards outperform equivalent 6xxx series, ie: 5850 > 6850. Having said that, I understand that the 6850 has a lower power draw, dx11, etc. But in nearly all games, raw FPS, doesn't the 5850 out perform the 6850? I wasn't following hardware at all when this occurred, so is there a link and/or cliff notes as to what happened?

In simplest terms, HD6850/6870 series replaced HD5750/5770 on the performance ladder (but they did debut at higher prices, so they aren't 'perfect' replacements). HD5850/5870 series were "refreshed" with HD6950/6970 series.

HD6850/6870 are Barts GPU design, which is largely a derivative of Cypress architecture (HD5850/5870 chip). Their additional features included UVD3.0, HDMI 1.4a, slightly improved tessellation performance, and improved texture filltering.

HD6950/6970 are Cayman GPU design, which changed the VLIW-5 Cypress architecture into a VLIW-4 design, improved ROP performance by a factor of 2-4x and improved tessellation performance by 1.5-3x as a result of Dual graphics engines. Unfortunately, due to the constraints imposed by the 40nm process, the number of SPs, clock speeds, etc. had to limited on the 69xx series, as well as other additional features (AMD won't discuss) had to be postponed for HD7000 series.

For more specific details on the improvements of HD69xx series over HD58xx series, feel free to refer to this outstanding write-up on Anandtech.