What is known is the following Gate Pitch x Metal Pitch
Intel 14nm = 70nm x 52nm
Samsung 14nm LPE = 78nm x 64nm
But, I also believe that 8-Core ZEN die should be smaller than 200mm2. It could be close to 160mm2 as Silverforce11 estimates.
Believe That's 70x 60 for Intel's "hp" process.
Also, SRAM is about 10% larger on Samsung ff.
I think the variables are too great to have this debate quite yet though. Highly Likely the core would end up smaller than Skylake even with a process density handicap, how much smaller is the unknown. E.g. Shrinking excavator module (with its HDL layout and GP stack) to 14nm would leave it roughly 30% smaller than a Skylake core.
Then you have twice as much L2 per core to consider, and an unknown amount of L3?
Intel have always tended to sacrifice area for larger speed optimised designs, using process node to their advantage (have their cake and eat it too). Now that density advantage is somewhat eroded, so it will be interesting to see there approach moving forward
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