Super Pi? Really, Super Pi? Why do these Asian sites refuse to use a competent benchmark? May as well run CPUMark 99.
Disregarding the fact that the site also tested with Cinebench R11.5, what's wrong with Super Pi as a measure of single threaded performance?
My old Pentium 4 @ 2.8 GHz did 1M in about 45 seconds
My Athlon 64 3500+ @ 2.8 GHz did 1M in about 32 seconds
My Core 2 Duo T8300 @ 2.4 GHz did 1M in about 21.5 seconds
My 2500K @ 5 GHz does 1M in around 7.5 seconds.
That shows a pretty good correlation between better single thread performance and super pi 1M times.
Well, to be fair, Nehalem rocks so hard that a "redesign" isn't going to be as drastic as a redesign of Stars which is...lacking.
Sandy Bridge is based on a completely new microarchitecture. It's not a die-shrink; that was Nehalem-->Wolfdale.
Sandy Bridge's development started in ~2005, which is about the same time development on Bulldozer began as well.
Disregarding the fact that the site also tested with Cinebench R11.5, what's wrong with Super Pi as a measure of single threaded performance?
My old Pentium 4 @ 2.8 GHz did 1M in about 45 seconds
My Athlon 64 3500+ @ 2.8 GHz did 1M in about 32 seconds
My Core 2 Duo T8300 @ 2.4 GHz did 1M in about 21.5 seconds
My 2500K @ 5 GHz does 1M in around 7.5 seconds.
That shows a pretty good correlation between better single thread performance and super pi 1M times.
Wolfdale was not a die-shrink of Bloomfield. (i7 900 series) Wolfdale was a die-shrink of Conroe (C2D) with more L2 cache.
Super Pi? Really, Super Pi? Why do these Asian sites refuse to use a competent benchmark? May as well run CPUMark 99.
Disregarding the fact that the site also tested with Cinebench R11.5, what's wrong with Super Pi as a measure of single threaded performance?
My old Pentium 4 @ 2.8 GHz did 1M in about 45 seconds
My Athlon 64 3500+ @ 2.8 GHz did 1M in about 32 seconds
My Core 2 Duo T8300 @ 2.4 GHz did 1M in about 21.5 seconds
My 2500K @ 5 GHz does 1M in around 7.5 seconds.
That shows a pretty good correlation between better single thread performance and super pi 1M times.
Beta hardware is beta and not gamma (production) for a reason.
If everything was sunny and rosy with bulldozer (including the platform) then it would be launched already.
There's a reason it ain't. And there's a reason a new stepping is involved...they don't spend money doing respins for the heck of it.
Beta hardware is beta and not gamma (production) for a reason.
If everything was sunny and rosy with bulldozer (including the platform) then it would be launched already.
There's a reason it ain't. And there's a reason a new stepping is involved...they don't spend money doing respins for the heck of it.
Add to that -
Improved prefetch
Drastically improved branch predictors
Drastic revamp of entire cache hierarchy
Many sections of the pipelines decoupled from the others
The fact there is sharing of very specific parts of uarch and other parts not. Stars shares...what the L3?
On paper the core and fundamentals BD uarch looks NOTHING like stars.
This cant be said of SB vs Nehalem.
Reading real world tech articles, when looking at BD vs stars - um...the graphs are very different. When reading about SB vs nehalem they look very similar...
I think you are unfairly characterizing any differences between Nehalem and SNB as insignificant, while lauding the exact same sort of changes by AMD as the Biggest Changes Ever. That seems irrationally biased to me. It's not based in fact at all.
It's typical. Just like the fact that there's rather marked evidence now that integer core frequency in Bulldozer is independent of the rest of the module... but it's a subject that no one else wants to discuss, I'm guessing because they don't want to believe it.
Not sure why not. It seems like a cool sort of change to me! Even cooler than the double-pumped ALUs on the P4. Presumably the integer schedulers would be clocked to match. Maybe even the decoders. Actually, come to think of it, it's most probably the FPU that's the odd unit out, in terms of clock. It would make more sense, with the independent FPU scheduling.
Don't worry, the old ES samples have absolutely no relevance to how it will actually perform. People have short memories. AMD has made very little actual official performance releases, which is actually a good thing (remember the hyped up phenom disaster). Does no one remember the athlon 64 engineering sample leaks? What were they, from like an 800mhz awful chip or something--then it came out and kicked ass. This thing isn't going to blow sandy bridge out of the water or anything, but get real--it's not going to be slower than an athlon 64x2 in single threaded apps like the engineering sample is. Expect +/- 10-25% diff from similarly priced SB chips depending on how many threads the app can use (not counting FMA or AVX or w/e i have no idea on those).
The question no one has the answer to at the moment (well, that is talking) is how it will overclock. How it performs stock doesn't really matter to me, lol.