Originally posted by: dmens
I really think the discussion regarding ramp timing, yields and bugs is distracting from the the core disagreement:
While they started shipping 65nm first, that doesn't mean AMD couldn't...it just didn't make financial sense for them to.
There's no choosing here, AMD is simply a year behind on 65nm, you can bet they're doing everything in their power to catch up. If they had a confident 65nm, they'd be demonstrating parts, setting release dates and doing everything intel was doing a year ago with cedarmills and yonahs. Also, I stick the the point regarding the convergence of design and process. If they don't sync, then it's lost money. All the talk regarding "full" yield on launch is a smokescreen for what is essentially a schedule screwup.
Why? What would making all of those announcements today gain for AMD? Intel still has no shipping product in those lines, so the only product they would "Osbourne" is their own...
BTW, they
have announced that they will be shipping 65nm to OEMs in Nov/Dec, they just haven't released details of the products. My guess is that we will see detailed specs of the 65nm Opterons when they begin volume production in August (which is very close to when Woodcrest is actually shipping).
As to your point on convergence, are you saying that Intel never improves on their yields once a ramp has begun?? This would greatly surprise me...it would also be a very negative comment on Intel's manufacturing!
Given that there is less pressure for them to decrease power immediately, they chose to maximise yields first...
Assuming an early 2007 launch of K8L, the process should be locked down ages ago. In fact, K8L should have taped out already. Power should have been exclusively tackled by design. The only job process has is to get yields higher. Which again indicates the lack of a choice on 65nm release timing.
1. It's ~a nine month window from first tape to volume production. It's also quite possible that K8L already HAS taped out and that AMD is (in keeping with their current business practise) just not announced it. Again, there really are no gains to be made by making the announcement at the moment.
2. Power is being tackled on multiple levels with K8L...with both design
and process. They are using the new SiGe DSL, 65nm, and new core/cache power management.
Calling the Woodcrest a 65W part and the Opteron an 80W part is VERY misleading! Those are TDP numbers which mean absolutely nothing to actual power use and can't even be used to compare thermals.
The AT article compares two 275 HE (low-power bins) at 2.2ghz against two 3ghz regular B0 woodcrests. Also, the woodcrest platforms use FB-DIMM (more power). Comparing power with those setups is absurd, or performance for that matter, that particular contest was a wipeout. Lower the woodcrest to the same performance as the opterons then you'll see.
I don't really care much about TDP, other than to say that the whole TDP argument has been poisoned by P4 and its power corners, but that's another thread.
I agree with you on TDP, it's pretty useless as a guage of power (I sure wish SPEC would hurry up with their new power benchmarks!)...but if you look again at the article, it also compares 2 full-power Opteron 275s...
Both Intel and AMD are constantly tweaking the process to improve efficiency. That's one reason that different batches of CPUs will overclock differently. They get feedback from the way parts are binned and by altering the doping amounts or any one of the many other factors, they can improve the yields/performance.
Of course, but it doesn't change the fact that there is a baseline readiness for a process which needs to exist before you even bother prototyping a part. I contend AMD is a year behind on that milestone.
I think this is where we disagree...determining what that baseline should be is not a universal decision, it is based on the company's own needs for the product. In this case my contention is that AMD requires a much higher baseline than Intel does, hence the delay.
The 40% increase is BECAUSE they can now make P almost as fast as N...
OK, that article was just a big smoking heap of FUD. Designers don't allow themselves to be hamstrung by ****** P stack delays, because there are alternatives available. But hey, IBM^H^H^HAMD might really have achieved 40% delay reduction, but it sure isn't because of this one thing. Pretty cool to have crisp rising edges too, and lower power. Whatever, we'll see later.
The article is based on AMD's presentation at the IEEE convention in December, where they layed out the process along with their experimental data...so no, it's really not FUD.
I don't understand why you think that the consumer market is closing up on AMD at all...
Volume. The only reason the consumer market even opened up this much was because of P4. With every process shrink, the odds swing against AMD. Hey, if AMD uses all the cash from the past few years to shore up their weaknesses, then the market will stay open. Big if, though.
A fair point...but remember that AMD's capacity will have tripled in one year by 2007, and they have already announced even more expansion plans.
Your point about AMD using their cash wisely is a good one. It's always a possibility that management can screw up a good thing...but I have to say that Ruiz has truly earned the respect of everyone (a far cry from Sanders), and I would put the odds strongly in his favour. JMHO (opinion is all there can be on this one...)