You don't know they're actively avoiding CMT, IDC
Somebody has to be the first in trying a novel type of architecture. Sure, you could make the argument that because IBM and Intel don't do it, it shouldn't be done, but don't forget that Intel's first attempt at SMT didn't go over too well either. Research into SMT at Intel is probably quite advanced, and it is implemented in Intel's architecture's quite well. To start developing a CMT architecture might not be cost effective (when compared to developing an improved SMT one).
Evaluating CMT is difficult at this point because we only have one example, and a poor one at that. We might try to consider the following:
1) If ST performance in BD (1M/1T) was equal to SB, how would we view its performance in its (4M/8T) actual configuration?
2) Is the huge die caused by the CMT configuration (in which case it is a non-starter) or something else?
Anyway, my point really was, doesn't AMD use SMT in BD's FlexFPU? If it does, it clearly can't be a patent issue. If they don't, it potentially could be (although they still could consider CMT a viable/superior alternative).