Could Skylake present us a regression in single-threaded performance?

[MisterMac]

Even tho IPC doesn't bump much - how on earth could you possibly think that would happen meloz?

Intel have had all the oppertunity to play the moar cores game and win on cost\margins - but chose not too.

Jesus.
Can you imagine any proud engineer\manager\VP\etc accepting WORSE performance on the core level?

 

[AtenRa]

And what would the alternative be?

SSE, AVX, FMA3 etc

 

[ShintaiDK]

SSE, AVX, FMA3 etc

Thats not really an alternative to higher overall IPC, only a supplement.

 

[Deders]

Jesus.
Can you imagine any proud engineer\manager\VP\etc accepting WORSE performance on the core level?

Isn't that what happened over at AMD after the Phenom II's?

 

[inf64]

Skylake is Broadwell on steroids, there is no way it will be regression in any way (clocks included). Skylake should have 2x the cache BW of Broadwell due to new AVX spec so legacy code can see some improvements from this alone. Other parts of the chip needed to be updated also so there is no chance Skylake will be regression. The only unknown is what kind of GPU will desktop parts have and at what clocks will they run (plus the onboard edram question).

 

[mikk]

The only unknown is what kind of GPU will desktop parts have and at what clocks will they run (plus the onboard edram question).

Why is this unknown? It's pretty clear based on many sources that Skylake-S Quad gets GT2 SKU based on Gen9. Because there is a 2 generation uarch gap to Haswell GT2 I expect a good leap for desktop.

 

[NostaSeronx]

Skylake is the architectural successor to Tejas.

P6M Generation;
- Banias
- Dothan
- Yonah
- Core
- Penryn
- Nehalem
- Westmere
- Sandy Bridge
- Ivy Bridge
- Haswell
- Broadwell

Skylake is the evolution of P68(Netburst) and P7(Itanium). Technically, it would be P8 if Intel was still using that scheme.

So, expect big things from an architecture, so efficient they dropped FIVRs.

 

[crashtech]

I figured they dropped FIVR because it generated too much heat in the die.

 

[NostaSeronx]

I figured they dropped FIVR because it generated too much heat in the die.

The FIVR reduces heat and power. The FIVR allows switching between idle and boost to be done really fast.

Essentially, the removal of FIVRs in Skylake. Is because the new architecture doesn't need to switch fast between idle and boost. Just to be a tiny bit more power efficient.

FIVRs will be re-implemented after Cannonlake with Icelake. That is two generations of good enough efficency with slow voltage state switching.

 

[podspi]

CPUs aren't art, CPUs are engineering projects.

Doesn't make sense for Intel to target lower speeds unless it buys them efficiency. Which is what the Atom line is for.

 

[Arachnotronic]

Skylake is Broadwell on steroids, there is no way it will be regression in any way (clocks included). Skylake should have 2x the cache BW of Broadwell due to new AVX spec so legacy code can see some improvements from this alone. Other parts of the chip needed to be updated also so there is no chance Skylake will be regression. The only unknown is what kind of GPU will desktop parts have and at what clocks will they run (plus the onboard edram question).

The big improvement in Skylake will be Gen. 9 media, which will add hardware support for quite a few video encode/decode standards that Gen. 8 media is lacking. Should be particularly useful in mobile (i.e. Broxton), but should also help Skylake-based convertibles/detachables.

 

[mikk]

Also HDMI 2.0 and Feature Level 12 support.

 

[jpiniero]

If you are saying "Could the Skylake locked quads that get released first be slower than 4790K" I would say yes.

 

[PPB]

Ipc doesnt concern me, clocks, on the other hand.... The leaked ES clocks sit between 2.3-2.5ghz,

 

[meloz]

Jesus.
Can you imagine any proud engineer\manager\VP\etc accepting WORSE performance on the core level?

If the choice was to accept a small hit in absolute performance to get much higher performance/watt, I suspect most proud engineer\manager\VP\etc would happily swallow their pride. I guess it also depends which aspect of CPU you are more proud of: its outright performance or peerless performance/watt.

Anyway, looks like I was freaking out over nothing. Y'all guys are confident Skylake should be a decent improvement over Broadwell and that's good enough for me. I was just beginnning to fret if Intel had extracted all the performance from their core design and now their focus would shift to increasing performance/watt at all costs.

 

[jpiniero]

I could definitely see Intel reducing IPC if they got a sufficient perf/watt improvement AND a nice density boost so they can pack in moar corez for servers.

That doesn't mean Skylake will though.

 

[DrMrLordX]

P6M Generation;
- Core

. . . Conroe? Sorry, just nitpicking!

 

[TechFan1]

I'm expecting skylake to be at least a 10% single thread performance bump on desktop over broadwell if not more. I'm guessing the K version of chips going forward will all be like devil's canyon, and released a bit later than locked versions with special tweaks to make it default clock much higher.

Also, my impression is that perf/watt will be very important going forward, not just for power consumption, but it will be the only way to continue increasing maximum performance (Example: Nvidia Maxwell).

 

[III-V]

I also expect Skylake's IPC increase to be around the 10% mark.

I also expect Broadwell to bring a return of 5GHz+ overclocks. This would be about a 10-15% clock speed bump over Devil's Canyon. This would mean Skylake would need stock clocks at ~4.5GHz to match Broadwell-K. I don't think that will happen, lol.

Ipc doesnt concern me, clocks, on the other hand.... The leaked ES clocks sit between 2.3-2.5ghz,

Read the thread...

Skylake is the architectural successor to Tejas.

P6M Generation;
- Banias
- Dothan
- Yonah
- Core
- Penryn
- Nehalem
- Westmere
- Sandy Bridge
- Ivy Bridge
- Haswell
- Broadwell

Skylake is the evolution of P68(Netburst) and P7(Itanium). Technically, it would be P8 if Intel was still using that scheme.

So, expect big things from an architecture, so efficient they dropped FIVRs.

Pretty crazy claim you're making, in regards to the Tejas thing.

 

[frozentundra123456]

I also expect Skylake's IPC increase to be around the 10% mark.

I also expect Broadwell to bring a return of 5GHz+ overclocks. This would be about a 10-15% clock speed bump over Devil's Canyon. This would mean Skylake would need stock clocks at ~4.5GHz to match Broadwell-K. I don't think that will happen, lol.


Read the thread...
Pretty crazy claim you're making, in regards to the Tejas thing.

Why do you think Broadwell will overclock higher than 5ghz? Not trying to argue with you, I just want to know why you think that. It will be an even smaller die than haswell, and I assume not soldered, so I think the heat problems will only continue to get worse. Or at least will be the same because of lower power use but dissipated by an even smaller chip.

The max overclock has consistently decreased a small amount with each generation since Sandy Bridge, so at best I would hope for an IPC increase and similar overclocks to Haswell.

 

[NostaSeronx]

Pretty crazy claim you're making, in regards to the Tejas thing.

Not saying it is Tejas or Itanium, but what was and is planned to be after both.

Tejas (Netburst) and Nehalem (Netburst) -(replaced by)> Skylake
Tukwila (Itanium) and Poulson (Itanium) -(replaced by)> Xeon Skylake

Skylake (Alpha/Transmeta) and Zen (Sparc/Alpha) will be an interesting processor fight.
(Design teams that each corporation acquired over time leading the projects)

 

[III-V]

Why do you think Broadwell will overclock higher than 5ghz? Not trying to argue with you, I just want to know why you think that. It will be an even smaller die than haswell, and I assume not soldered, so I think the heat problems will only continue to get worse. Or at least will be the same because of lower power use but dissipated by an even smaller chip.

The max overclock has consistently decreased a small amount with each generation since Sandy Bridge, so at best I would hope for an IPC increase and similar overclocks to Haswell.

The higher heat density is a symptom, not the underlying issue, which was that switching speeds and Idsat:Ioff stagnated at high voltage when moving to 22nm. So that explains Ivy and a good part of Haswell. Haswell additionally had to deal with 10% extra heat being released on die, thanks to the FIVR.

Mobile clocks and performance/watt went up considerably, which goes to show that it was simply at the cost of high performance designs. With 14nm though, we're getting squared-off fins, which are pretty much unanimously regarded as being better for performance, and the high performance parts don't have to be dragged down by the Y series parts.

 

[PPB]

Read the thread...

Intels ES are mostly run at production clock speeds, at least the ones that show up only a few months vefore launch like these ones.

 

[mikk]

Intels ES are mostly run at production clock speeds, at least the ones that show up only a few months vefore launch like these ones.

Not for the first ES samples. You should know that ES samples are going through different stages.

http://www.computerbase.de/2011-07/erste-benchmarks-von-intels-ivy-bridge-aufgetaucht/

Ivy Bridge ES1 or ES2 was clocked with 1.8 Ghz which isn't untypical for an ES1 CPU from Intel. There is nothing we can read about clock speeds for Retail CPUs based on ES1 samples. At this stage this is not important.

 

[ShintaiDK]

Ipc doesnt concern me, clocks, on the other hand.... The leaked ES clocks sit between 2.3-2.5ghz,

You must have been outright scared of SB/IB/HW ES samples then. They barely hit 2Ghz for the most part