CPU Overclocking, Vcore MAX myths and truth

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

But there's a flaw in your logic. That 4% would be for 100% load, the compensation would be different at say 50% load.

4% of 50% load is not the equal of 4% of 100% load.

Originally posted by: Gillbot

The response is NOT linear when it comes to load.

The droop rate is linear from minimum to max load. If its not you should get yourself a real engineer to re-design the power supply.

4% regulation power supplies don't change to 2%, 6%, or 8% regulation due to loading.

So show us some proof that the droop rate is linear. I can tell you that on every board I've owned, the droop varies based on load. I guess every major manufacturer doesn't employ a single real engineer.

 

[Idontcare]

This thread sure became full of all kinds of fail.

The notion that LLC is a static pre-existing lookup table/algorithm based on predefined and characterized load/unload patterns is 100% hogwash.

The argument that transients do not exist in an LLC enabled system is simply uneducated BS.

Voltage transients exist in all systems with non-zero capacitance, you can't blithely discard Maxwell's equations.

To create an effective pre-compensation algorithm for LLC as suggested here you would need to have extremely tight distribution of components characteristics for all your VRM's and power distribution components on the motherboard, and you'd need to know exactly how every CPU at any frequency and VID (i.e. all variation in those power distributions) characterized in advanced and factored into the algorithm.

It would get even more challenging once Ohm's law is accounted for and we realize the capacitance and power-draw is temperature dependent as the resistance of the system changes based on its operating temperature. Again to accomplish what is being posited here the mobo manufacturers would also need to pre-compensate for IR drop as a function of temperature as R is a function of temperature.

Think about that for a moment, to pre-compensate in the manner necessary to accomplish what has been posited above you would need to characterize all the power distribution and control components on the PSU, on the motherboard, and in the CPU for every possible VID/GHz combination for every CPU that would be manufactured (capacitance is CPU variation dependent) in addition to its specific IR drop characteristics dependant on the operating temperature and cooling/heating parameters. If the CPU cools to quickly in going from loaded to unloaded then the IR drop will decrease faster than you expected and your pre-compensating LLC will overvolt the chip temporarily (i.e. voltage transient).

The challenge to do this would be mammoth in all metrics. Which is why it is simply not done in practice.

Load line calibration is nothing new or special, it is a pre-existing technique called dampening. http://en.wikipedia.org/wiki/Overshoot In fact on my Asus board you won't find a BIOS option for enabled LLC, instead you find an option to toggle "CPU Voltage Dampening".

Dampening suppresses transients but does not eliminate them, it shrinks the time-domain over which they exist but it can never make them become zero. Now we can convince ourselves they are zero by limiting ourselves to collecting data with a measurement system which fails to have a sufficient sampling rate as needed to capture the voltage oscillations in the time domain for which they exist.

CPU-z is not going to capture voltage transients that exist for less than 1/8192 of a second (typical max clock resolution for software access on a PC). You would need the proper equipment (I used Keithley o-scopes in grad school, they worked on the nanosecond time regime just fine and did not cost too much) to generate the data. An absence of data does not a theory prove.

And as for the comments regarding "real engineers"...I am a real engineer and the volume of information that someone here needs to become familiar with in order to understand the ignorance on display here would fill books. Seriously, for starters they would do well to flip thru Automatic Control Systems by Kuo and Golnaraghi and come to terms with how passive vs. active electrical control systems are implemented in reality and (perhaps more importantly) why they have to be implemented in such manner owing to the constraints of physics and Maxwell's equations governing the characteristics of electrical systems.

 

[beray]

Perfect ideal DC voltage power supplies had zero input impedance, with perfect power transfer to all loading, and zero output droop rate.

Real world DC voltage supplies are not perfect, do not have zero input impedance, and will have output drooping. But an engineer who could only made them with large input impedance (monster droop rate) or huge non-predictable variable input impedance (variable droop rate) should go into some other line of work to be "real engineer" in.

 

[Idontcare]

Originally posted by: beray
Perfect ideal DC voltage power supplies had zero input impedance, with perfect power transfer to all loading, and zero output droop rate.

I'm pretty sure everyone but you in this thread is restricting their conversation to actual real-world implementation of LLC in real systems, nothing about ideal or hypothetically perfect scenarios have been mentioned by anyone but you.

So are you talking about how LLC actually works or are you just espousing your opinion on how it ought to work in some non-existent hypothetical only in your mind world where we bought mobo's, PSU's, and CPU's made of some exotic material that had zero temperature response to the IR aspects of the system's capacitance?

Originally posted by: beray
Real world DC voltage supplies are not perfect, do not have zero input impedance, and will have output drooping.

Gee, welcome to the third post of this thread. Now if only you hadn't opened your mouth and made a series of bogus statements in your posts then we might actually be convinced you knew this before yesterday. But don't let me stop you from continuing to confirm our suspicions beyond all reasonably doubts...

Originally posted by: beray
But an engineer who could only made them with large input impedance (monster droop rate) or huge non-predictable variable input impedance (variable droop rate) should go into some other line of work to be "real engineer" in.

You mean those Intel engineers that created the very Vdroop allowance spec you are saying is eliminated by your mythical magical workings in LLC?

Sorry all you Intel engineers, guess you now have official confirmation that you aren't real engineers and you really should seek employment in some other line of work. :roll:

How much fail do you intend to bring to this thread? We are all still waiting on pins and needles for you to post some proof of what you say, these new physics and replacement equations for poor old Maxwell (what a douche that Maxwell, what did he ever know anyways?) that you are invoking in this fantasy world of yours.

 

[beray]

Originally posted by: Idontcare

How much fail do you intend to bring to this thread? We are all still waiting on pins and needles for you to post some proof of what you say, these new physics and replacement equations for poor old Maxwell (what a douche that Maxwell, what did he ever know anyways?) that you are invoking in this fantasy world of yours.

I supposed factual garden variety power supply common sense isn't sufficient as proof nor factual enough. OK, OK... Lets try something else below...

Ideal voltage power supplies had perfectly predictable and non-variable droop rate of zero <-- 0% regulation load line.

Other close but non-ideal voltage supplies had 2%, or 3%... 8% regulation load line which could be corrected by LLC.

How do you specify percentage regulation of the power supply you had just engineered, when its droop rate the absolute opposite from ideal and is hugely variable and non-predictable due to loading?

 

[Gillbot]

Originally posted by: beray

Originally posted by: Idontcare

How much fail do you intend to bring to this thread? We are all still waiting on pins and needles for you to post some proof of what you say, these new physics and replacement equations for poor old Maxwell (what a douche that Maxwell, what did he ever know anyways?) that you are invoking in this fantasy world of yours.

I supposed factual garden variety power supply common sense isn't sufficient as proof nor factual enough. OK, OK... Lets try something else below...

Ideal voltage power supplies had perfectly predictable and non-variable droop rate of zero <-- 0% regulation load line.

Other close but non-ideal voltage supplies had 2%, or 3%... 8% regulation load line which could be corrected by LLC.

How do you specify percentage regulation of the power supply you had just engineered, when its droop rate the absolute opposite from ideal and is hugely variable and non-predictable due to loading?

You have strayed this topic so far off track that a GPS couldn't get it back now.

We are not debating "factual garden variety power supply common sense", we are discussing the droop and transients of a simple circuit and the affect of load on the offset voltage of that circuit.

 

[beray]

Originally posted by: Gillbot

You have strayed this topic so far off track that a GPS couldn't get it back now.

We are not debating "factual garden variety power supply common sense", we are discussing the droop and transients of a simple circuit and the affect of load on the offset voltage of that circuit.

LLC removed transients.

I used factual garden variety power supply common sense for the how of "LLC" AKA "Load Line Calibration" to real power supplies with non-ideal but known and predictable regulation load lines for people who didn't know the how.

I'd like to learn from Idontcare how his LLC implementations worked for power supplies with hugely variable and non-predictable regulation load lines.

It'd be interesting to know the reasons why any engineers would built regulated voltage power supplies with un-known and un-predictable load lines.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

You have strayed this topic so far off track that a GPS couldn't get it back now.

We are not debating "factual garden variety power supply common sense", we are discussing the droop and transients of a simple circuit and the affect of load on the offset voltage of that circuit.

LLC removed transients.

I used factual garden variety power supply common sense for the how of "LLC" AKA "Load Line Calibration" to real power supplies with non-ideal but known and predictable regulation load lines for people who didn't know the how.

I'd like to learn from Idontcare how his LLC implementations worked for power supplies with hugely variable and non-predictable regulation load lines.

It'd be interesting to know the reasons why any engineers would built regulated voltage power supplies with un-known and un-predictable load lines.

You have been warned in the past to stop spreading misinformation, you need to stop here.

LLC CAN NOT "remove" transients. Period.

Also,

I used factual garden variety power supply common sense for the how of "LLC" AKA "Load Line Calibration"

You used nothing except your own ideas. Show us examples instead of using your own misguided words.

 

[beray]

Originally posted by: Gillbot

You have been warned in the past to stop spreading misinformation, you need to stop here.

Yes, you had banned me twice for "not posting facts".

Originally posted by: Gillbot

LLC CAN NOT "remove" transients. Period.

LLC can't remove v-droop and v-offset?

Did you not said the below?

This gap you are compensating for is called Voffset.

Among other things (like eliminating Vdroop), LLC (loadline calibration) is tuned to make Voffset = 0.

-----------------------


no Vdroop and no Voffset = removed transients.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

You have been warned in the past to stop spreading misinformation, you need to stop here.

Yes, you had banned me twice for "not posting facts".

Originally posted by: Gillbot

LLC CAN NOT "remove" transients. Period.

LLC can't remove v-droop and v-offset?

Did you not said the below?

This gap you are compensating for is called Voffset.

Among other things (like eliminating Vdroop), LLC (loadline calibration) is tuned to make Voffset = 0.

-----------------------


no Vdroop and no Voffset = removed transients.

No, droop and offset are not the ONLY transients. Look at the article again, see the maximum negative overshoot? That is also a transient induced by LOAD CHANGE.

You will see the area from heavy to light load change, that is where vdroop and voffset come into play. See THIS

See THIS and THIS also. You see the ripple or "ringdown"? That is the circuit compensating for the changes in the load state. LLC is not designed to supress these transients and cannot be a "one time" calibration because the load range is too wide for it to handle.

 

[Idontcare]

Voffset is a value which the system settles out at after the voltage ringing (transient) is done and reflects the fact the capacitance for the system is non-zero at any non-zero operating voltage.

Further, Voffset will be temperature dependent due to the IR drop component and as such will be subtly different depending on the cooling solution used by the system owner.

Having no Voffset is not the same as having no transient. One is a steady-state characteristic, the other is a direct consequence of having a system changing states in a most decidedly non-steady state environment.

LLC can be setup to dynamically compensate for Voffset...and it can make Voffset zero after a settling time for which the control system oscillates (transients) until the voltage delta to reference is zero. (have you any experience with PID controllers?)

But setting up LLC to compensate for Voffset at steady-state says absolutely nothing about the transition which the system experienced to get from one state to the other.

 

[beray]

Originally posted by: Gillbot

No, droop and offset are not the ONLY transients. Look at the article again, see the maximum negative overshoot? That is also a transient induced by LOAD CHANGE.

You will see the area from heavy to light load change, that is where vdroop and voffset come into play. See THIS

See THIS and THIS also. You see the ripple or "ringdown"? That is the circuit compensating for the changes in the load state.

Yes I see what you mean, I called it the Gibbs_phenomenon, you should read the link to comprehend where "ringdown" originated from.

Originally posted by: Gillbot
LLC is not designed to supress these transients and cannot be a "one time" calibration because the load range is too wide for it to handle.

The only thing LLC did is removing transients called vdroops, fortunately with vdroops removed "ringdown" transients went with them.

 

[CTho9305]

beray, you sound like you know enough about this to be both convincing to others and very wrong at the same time. I'll put this simply: all wires in the real world have resistance, capacitance, and inductance. If you drive a load through an RLC circuit, there is NOTHING you can do to avoid some amount of variation in the voltage delivered to the load if the load is non-constant and not absolutely predictable. When you're dealing with loads like microprocessors, the parasitics become significant. This MIT lecture looks interesting, although it's mostly focused on the package rather than the board.

But an engineer who could only made them with large input impedance (monster droop rate) or huge non-predictable variable input impedance (variable droop rate) should go into some other line of work to be "real engineer" in.

You clearly have no understanding of the real world. Get back to us when you figure out how to drive a load that varies between 90 amps (125W, 1.4V) and ~10 amps on a timeframe of nanoseconds, with no under/overshoot. Oh, and you don't get to use 4-gauge wire, you get to use traces on a PCB. Your solution also has to be cheap.

The harmonic oscillations are at such a high frequency and return to norm fast enough that they're hardly important.

This is not true. You can crash chips with the undershoot. They're fast enough that someone like beray might look at voltage monitoring and miss them (incorrectly concluding that the voltage is rock-steady), but they're slow enough that if you're unlucky (or made a design mistake) you may not have enough decoupling cap to supply power to the transistors and you get a crash.

edit: This very informative article (advertisement) has real oscilloscope data showing transients with and without "vdroop".

 

[beray]

Originally posted by: CTho9305
beray, you sound like you know enough about this to be both convincing to others and very wrong at the same time. I'll put this simply: all wires in the real world have resistance, capacitance, and inductance. If you drive a load through an RLC circuit, there is NOTHING you can do to avoid some amount of variation in the voltage delivered to the load if the load is non-constant and not absolutely predictable. When you're dealing with loads like microprocessors, the parasitics become significant. This MIT lecture looks interesting, although it's mostly focused on the package rather than the board.

But an engineer who could only made them with large input impedance (monster droop rate) or huge non-predictable variable input impedance (variable droop rate) should go into some other line of work to be "real engineer" in.

You clearly have no understanding of the real world. Get back to us when you figure out how to drive a load that varies between 90 amps (125W, 1.4V) and ~10 amps on a timeframe of nanoseconds, with no under/overshoot. Oh, and you don't get to use 4-gauge wire, you get to use traces on a PCB. Your solution also has to be cheap.

I used LLC for constant and predictable regulation load line to remove droops, I've been using it for about 25yrs. How did you do it on your non-constant and not predictable load? I'd like to learn how to do it, I'm not afraid of being ignorant of how to do it your way.

Teach me.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

No, droop and offset are not the ONLY transients. Look at the article again, see the maximum negative overshoot? That is also a transient induced by LOAD CHANGE.

You will see the area from heavy to light load change, that is where vdroop and voffset come into play. See THIS

See THIS and THIS also. You see the ripple or "ringdown"? That is the circuit compensating for the changes in the load state.

Yes I see what you mean, I called it the Gibbs_phenomenon, you should read the link to comprehend where "ringdown" originated from.

Originally posted by: Gillbot
LLC is not designed to supress these transients and cannot be a "one time" calibration because the load range is too wide for it to handle.

The only thing LLC did is removing transients called vdroops, fortunately with vdroops removed "ringdown" transients went with them.

There will always be transients caused by load change. LLC can compensate for vdroop, but it will NEVER remove all the transients. Also, the compensation for vdroop does NOT remove the overshoot voltages. As load changes, power demand on the circuit will change and thus will cause fluctuations on the circuits power consumption and these changes will cause transients.

 

[Idontcare]

Originally posted by: CTho9305
edit: This very informative article (advertisement) has real oscilloscope data showing transients with and without "vdroop".

Man I love when you have the time to pop into threads like this :thumbsup:

You never fail to deliver! +1

 

[beray]

Originally posted by: Gillbot

There will always be transients caused by load change. LLC can compensate for vdroop, but it will NEVER remove all the transients. Also, the compensation for vdroop does NOT remove the overshoot voltages. As load changes, power demand on the circuit will change and thus will cause fluctuations on the circuits power consumption and these changes will cause transients.

"The only thing LLC did is removing transients called vdroops" , no vdroops = no gibbs phenomenon = no maximum negative overshoot = no Voffset = no Vringdown.

LLC removed all vdroops and vdroop derived transients, LLC doesn't cover any other transients not shown HERE.

The coverage for other mythical transients belongs to other compensation method techniques and not LLC.

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

There will always be transients caused by load change. LLC can compensate for vdroop, but it will NEVER remove all the transients. Also, the compensation for vdroop does NOT remove the overshoot voltages. As load changes, power demand on the circuit will change and thus will cause fluctuations on the circuits power consumption and these changes will cause transients.

"The only thing LLC did is removing transients called vdroops" , no vdroops = no gibbs phenomenon = no maximum negative overshoot = no Voffset = no Vringdown.

LLC removed all vdroops and vdroop derived transients, LLC doesn't cover any other transients not shown HERE.

The coverage for other mythical transients belongs to other compensation method techniques and not LLC.

And once again, you are spreading misinformation. The removal of Vdroop DOES NOT remove the transients caused by shifting from no load to full load.

 

[beray]

Originally posted by: Gillbot

And once again, you are spreading misinformation. The removal of Vdroop DOES NOT remove the transients caused by shifting from no load to full load.

What are "the transients caused by shifting from no load to full load"? Please fill in the question marks below.

1 - Transients due to drooping regulation load line from no load to full load <-- LLC corrected.

2 - Transients due to ??? <-- ??? corrected.

3 - ???

 

[Gillbot]

Originally posted by: beray

Originally posted by: Gillbot

And once again, you are spreading misinformation. The removal of Vdroop DOES NOT remove the transients caused by shifting from no load to full load.

What are "the transients caused by shifting from no load to full load"? Please fill in the question marks below.

1 - Transients due to drooping regulation load line from no load to full load <-- LLC corrected.

2 - Transients due to ??? <-- ??? corrected.

3 - ???

This has been answered REPEATEDLY.

Originally posted by: Idontcare

Originally posted by: CTho9305
edit: This very informative article (advertisement) has real oscilloscope data showing transients with and without "vdroop".

Man I love when you have the time to pop into threads like this :thumbsup:

You never fail to deliver! +1

LLC is not a cure all for transients.

LLC removed all vdroops and vdroop derived transients

This statement is 100% misinformation.

LLC for constant and predictable regulation load line to remove droops

This is 100% misinformation,

A CPU circuit is NOT constant and predictable because the VID of CPUs vary greatly and thus their power consumption greatly varies.

Originally posted by: CTho9305
beray, you sound like you know enough about this to be both convincing to others and very wrong at the same time. I'll put this simply: all wires in the real world have resistance, capacitance, and inductance. If you drive a load through an RLC circuit, there is NOTHING you can do to avoid some amount of variation in the voltage delivered to the load if the load is non-constant and not absolutely predictable. When you're dealing with loads like microprocessors, the parasitics become significant. This MIT lecture looks interesting, although it's mostly focused on the package rather than the board.

But an engineer who could only made them with large input impedance (monster droop rate) or huge non-predictable variable input impedance (variable droop rate) should go into some other line of work to be "real engineer" in.

You clearly have no understanding of the real world. Get back to us when you figure out how to drive a load that varies between 90 amps (125W, 1.4V) and ~10 amps on a timeframe of nanoseconds, with no under/overshoot. Oh, and you don't get to use 4-gauge wire, you get to use traces on a PCB. Your solution also has to be cheap.

The harmonic oscillations are at such a high frequency and return to norm fast enough that they're hardly important.

This is not true. You can crash chips with the undershoot. They're fast enough that someone like beray might look at voltage monitoring and miss them (incorrectly concluding that the voltage is rock-steady), but they're slow enough that if you're unlucky (or made a design mistake) you may not have enough decoupling cap to supply power to the transistors and you get a crash.

edit: This very informative article (advertisement) has real oscilloscope data showing transients with and without "vdroop".

You need to STOP posting your opinion over and over. If you have FACTUAL evidence, POST IT. Show us some data and keep your factual garden variety power supply common sense to yourself.

 

[beray]

Originally posted by: Gillbot

This has been answered REPEATEDLY.

The article is about robbing Peter to pay Paul engineering. Spreading sharp intense spikes over larger areas, time frequency distribution technique.

Slightly degraded the output regulation load line at higher voltage level would be used. Trading ESR and ESL spikes with higher voltage level and additional vdroop which didn't exist before.

exhibit (1a) ESR and ESL transients.

exhibit (1b) Degraded regulation load line vdroop transient with higher voltage level.

Originally posted by: Gillbot
LLC is not a cure all for transients.

What are "the transients caused by shifting from no load to full load"?

1 - Transients due to drooping regulation load line from no load to full load <-- LLC corrected - transients null and void.

2 - Transients due to ESR and ESL <-- Degraded regulation load line hack used for compensation - transients relocated.

 

[Gillbot]

I'm done replying to you because you obviously fail to comprehend even the simplest of Ohms Law. Keep your misinformation from my thread.

 

[ural]

Idontcare, seems like you are a controls guy, so I have a question - is enabling LLC is similar to adding Integral Gain Ki to the voltage controller? As far as I remember Ki added in PI-controllers to bring in a resistance to steady-state disturbances.

 

[Idontcare]

Originally posted by: ural
Idontcare, seems like you are a controls guy, so I have a question - is enabling LLC is similar to adding Integral Gain Ki to the voltage controller? As far as I remember Ki added in PI-controllers to bring in a resistance to steady-state disturbances.

I am not really a control's guy, I merely have some working knowledge and a few years experience. There are far deeper pockets of expertise walking around the forum, I trust they will step in and correct any false impressions I might create in posting the following:

I really like this online tutorial describing how and why the different aspect of P, I, and D are all involved in making an effective PID control system:

http://www.engin.umich.edu/group/ctm/PID/PID.html

I'm not privy to exactly what any given mobo maker has implemented in their particular flavor of PID. (meaning are they using P, PD, PI, or full-blown PID controls) They are all guaranteed to be slightly different just for the simple sake of IP infringement avoidance.

You can tell the "model" that Anandtech used to generate their simulated transient curves in the OP's linked article is in fact based on simple Kp (proportional controls) as the transients (overshoot) are quite pronounced increased while the settling times remain consistent whether they are loading or unloading and there is a steady-state error (Voffset).

Since LLC is shown to eliminate steady-state error (little to no Voffset) we are safe to assume the mobo makers are implementing some manner of Proportional-Integral control.

The question, as you are hinting at, is how aggressive is the Ki in terms of the added overshoot (which is NOT the same as an increase in Vpeak overshoot, it is the integrated area of the voltage curve above the targeted steady-state value) and delayed rise-time (or in this case response time).

CPU-z does not sample the Vcc at high enough frequency to capture the evolution of a transient with or without LLC, so we armchair circuit designers really don't have an easy way to generate the data we need to make an educated assessment of what the mobo guys have implemented. We really one of their engineers to spill some beans or someone here to pony up and buy a $10k oscope and connect it the Vcc power planes and see how the transients develop in real-time with and without LLC.

 

[kjboughton]

Originally posted by: Idontcare

Originally posted by: ural
Idontcare, seems like you are a controls guy, so I have a question - is enabling LLC is similar to adding Integral Gain Ki to the voltage controller? As far as I remember Ki added in PI-controllers to bring in a resistance to steady-state disturbances.

I am not really a control's guy, I merely have some working knowledge and a few years experience. There are far deeper pockets of expertise walking around the forum, I trust they will step in and correct any false impressions I might create in posting the following:

I really like this online tutorial describing how and why the different aspect of P, I, and D are all involved in making an effective PID control system:

http://www.engin.umich.edu/group/ctm/PID/PID.html

I'm not privy to exactly what any given mobo maker has implemented in their particular flavor of PID. (meaning are they using P, PD, PI, or full-blown PID controls) They are all guaranteed to be slightly different just for the simple sake of IP infringement avoidance.

You can tell the "model" that Anandtech used to generate their simulated transient curves in the OP's linked article is in fact based on simple Kp (proportional controls) as the transients (overshoot) are quite pronounced increased while the settling times remain consistent whether they are loading or unloading and there is a steady-state error (Voffset).

Since LLC is shown to eliminate steady-state error (little to no Voffset) we are safe to assume the mobo makers are implementing some manner of Proportional-Integral control.

The question, as you are hinting at, is how aggressive is the Ki in terms of the added overshoot (which is NOT the same as an increase in Vpeak overshoot, it is the integrated area of the voltage curve above the targeted steady-state value) and delayed rise-time (or in this case response time).

CPU-z does not sample the Vcc at high enough frequency to capture the evolution of a transient with or without LLC, so we armchair circuit designers really don't have an easy way to generate the data we need to make an educated assessment of what the mobo guys have implemented. We really one of their engineers to spill some beans or someone here to pony up and buy a $10k oscope and connect it the Vcc power planes and see how the transients develop in real-time with and without LLC.

What he said.

BTW, I may know just the guy to donate the time and wisdom to answer the question above. Let me see if I can entice him to do us all a little favor.