CPU speed- Please read

[pm]

<< However, I don't think it's unreasonalbe to assume that Intel could have easily released ~2.5Ghz P4 Northwoods on the 7th when they actually announced at 2.2GHz (I say 2.5GHz from the early overclocking results around the web. I'm assuming that overclocking results are an indication of the overall progress of the core here...if anyone disagrees with this we can start another thread, but let's just assume this is true for the purposes of this discussion). >>


I disagree with this. We can start another thread to discuss this, but this point is fairly important to this thread, so I think it's good to discuss it here.

The fundamental difference in my opinion is the difference between "it works ok for me" and what a high-volume manufacturer calls "production worthy". The source of this post is about Intel's Pentium 4 microprocessor, but this discussion is applicable to every semiconductor component that has clocked logic.

Voltage vs. Reliability:
How many of these amazing overclocks involved voltage increases? How many of the people doing these voltage increases have even a faint idea of what this small bump will do to their long-term reliability of their CPU? If the increase cuts the lifetime in half, how many even care? I don't think most would care, but a manufacturing company selling millions will care about a huge number of returns in a few years. So a hobbyist can play around with voltages, but a company spends a lot of engineering time carefully weighing operating lifetime against performance.

Environment:
Intel's parts are specified to operate in fairly harsh environments. The case temperature for a Pentium 4, for example, (according to the PDF datasheet) can be as high as 68C. Think about that for a minute: 68C is 154F. That's just the case temperature - we haven't even looked at the internal die temperature. The design needs to work not just in someone's basement, but in an un-airconditioned building in a desert. In addition, voltage droops are taken into account, so in the example above people are increasing the voltage, but in reality parts are designated to take into account voltage droops on the supply to account for shoddy power supply designs and non-ideal power grids.

Stability:
Lastly of the things that I can think of right now, there's relative degrees of stability. Stability to a manufacturer means that this part will reliably work on every program that is available and any that can be written using valid code. Stability for many reviewers (and enthusiasts) is for it to complete a limited benchmark suite and work for their favorite game. There are frequent debates here at AT (and other BBS's) about whether passing Prime95 is necessary for a part to be "stable". This is a non-debatable issue for a manufacturer and the answer is "of course it has to pass Prime95 to be specified at that frequency." And Prime95 is far from being the worst possible program you could run - contrary to what people seem to think. There are other programs out there that stress the CPU substantially more than Prime95 - they just aren't freeware. Plenty of people considered their systems "stable" prior to the release of Unreal and then complained about bad programming after the game was released and crashed frequently on their systems. It was so bad that Epic (the developer) added a FAQ entry to their page to say "before you call us with problems, make sure your CPU isn't overclocked". True "stability" is working on every program that is available and any one that could theoretically be written using valid code. This is vastly more stringent than merely being able to make it through 3DMark.

So if you take into account voltage and reliability, worst-case operating environment, and stability across every application in existence... how many of the people who say that a processor is a "great overclock" would actually qualify as "production worthy"? If you can barely run your CPU at a given frequency with a $40 heatsink/fan, using a high-quality overspec'd power supply, in a room that is at 70F, with a voltage increase and only on a fairly limited application set - how could a manufacturer release this same design for mass manufacturing?

 

[Evadman]

<< For this to occur, one of the designers would have had to really goof. >>


That would be me. Sorry PM, I was drunk that day

Great info PM, I am gonna re-read that gain to make sure I did not miss anything. Now I know why you work where you do

 

[CSoup]

Also, with the tweaks over time that improve yields at higher speeds, time allows the manufacturer to collect (hoard) enough lower yield, higher speed chips to meet market demand when they are released.

 

[Eskimo]

I certainly agree with everything pm said, except that he accepted the offer from Intel instead of AMD , but there is indeed an economic side to the coin. As a process is improved and tweaked a speed grade that is obtainable today (2.4GHz P4 perhaps) becomes economically feasible to release based on yield. There is a limit on what people will pay for even a high end processor, especially in today's market. As such the additional margin that part will be able to obtain might not be enough to counteract the fact that the current process is not able to produce that part in sufficient quantity due to yield (whether defect or performance related). Intel figures they are not losing any great deal of money by simply shipping 2.4GHz CPUs as 2.2GHz. To their customers and much of the world they are perceived as the leaders in desktop x86 performance at 2.2GHz. Large customers such as OEMs demand a certain volume in order to fill their respective lines and this forces a company like Intel to manage when it releases it's products in order to both maximize profits as well as fulfill comittments. So over time design and process improvements will enable the yield enhancement necessary to make it economically favorable to release an increased speed grade.

 

[pm]

<< I certainly agree with everything pm said, except that he accepted the offer from Intel instead of AMD >>

Written by a person living in Austin... Hmmm.

That's a very good point about volumes as well... that makes a good fourth bullet item to my last post.

Although I don't know that there is much of an upwards limit on processor price if the performance delta between a hypothetical design and all of the others is high enough. If, for example, someone developed an IA32 CPU that ran >100% faster (particularly in key benchmarks such as tpmC) than all others out there and released it today with the right feature set in the right volumes with reasonable power and high bandwidth, I could imagine easily charging 400-500% more than the competition and still having high sales. There are applications where simply adding more CPU's (SMP) and more boxes (distributed computing) to the problem doesn't help as much as adding higher performance parts.

 

[Bozz]

pm: I'd just like to delve a little deeper into the target frequency that various circuits are designed for by the processor team.

Lets take a hypothetical situation of the team is designing a processor to hit 4GHz. Would they engineer all circuits to operate at 4GHz by mathematical and scientific calculative means by factoring all known possible problems into the design so at switch on it should stably (sp?) function at the intended frequency?

If so when all the different blocks are put together resulting in a complete processor schematic which I would assume has further fine tuning, does the actual product get close to hitting the 4GHz mark or would a production product operate at perhaps 3GHz and be fine tuned to eventually hit 4GHz? Or would it likely operate at 4GHz and be fine tuned to (example) 6.5GHz?

Finally I would like to thank you for sharing your wealth of knowledge with us, many people would not give us the time of day, it is excellent to see you love your work enough to educate the general public who are interested in this topic!

Cheers

 

[Freejack2]

<< Another case of marketing influencing product releases: take the recently released 845D chipset for example. This chipset has had DDR capability all along and yet it was released to support only SDRAM. The functionality is already in the silicon and it doesn't cost them anymore to support DDR...so why would Intel deliberately not use DDR in the first place? Would DDR not make them more competitive and have faster systems? Again, they've chosen this route due to marketing reasons. >>



Actually to my knowledge they couldn't sell a DDR chipset until Jan 1st, because of their foolish agreements with rambus.




<< So why didn't they go with 2.5GHz? Wouldn't 2.5GHz put an even bigger gap between them and their competition, namely AMD? I think it's reasonable to say in this case that marketing factors heavily influenced choosing 2.2GHz. First of all, psychologically 2.2GHz is a smoother, more natural increase from 2.0GHz. It also allows their pricing scale to remain the same. It also prevents Intel from "wasting" the speeds between 2.0GHz and 2.5GHz and would allow them to squeeze out a few more "new" product cycles from the new .13u process. >>



Like PM said, Intel, AMD, and others have to engineer their chips to do everything under every condition.
While they could probably pump out a 3ghz p4 right now it would cause them numerous headaches, chip failures, unable to run programs, etc... It has to pass all their tests to run at 3ghz. That includes apps most of us will never run in our lives, and it means it has to run at 3ghz on a $15 heatsink in an unairconditioned room in the desert. A 3ghz p4 right now won't do that.
On the other hand overclockers like us don't qualm at spending $50 for a heatsink, or large sums of money for pelitier, or water cooling. Our cpus usually run in air conditioned homes and our cases have more fans than we care to think about. Also we don't care if our processor can crunch some strange expensive program all day without one error in a million years. Our tolerance requirements for an overclocked p4 3ghz or overclocked Athlon XP 1.8ghz can tolerate an occasional processor error crashing us out of Max Payne. A bank on the other hand processing everyone's bank accounts can't tolerate a missed or messed digit every once in a while.

It's not a bad thing though, for patient overclockers it can mean a bit of savings. Back when I had a p3-700, I paid maybe $180 for it and I overclocked it to 933 using a $40 heatsink. For $220 I was operating at the speed of a chip costing hundreds more. It was great for me I was running everything faster and having a ball. Granted there were probably occasional processor errors that crashed whatever game I was running but if it did, it wasn't the end of the world. On the other hand there is no way in he!l that I would put a computer with an overclocked cpu into a bank or other place where one simple cpu messup can create serious problems.

 

[pm]

<< Lets take a hypothetical situation of the team is designing a processor to hit 4GHz. Would they engineer all circuits to operate at 4GHz by mathematical and scientific calculative means by factoring all known possible problems into the design so at switch on it should stably (sp?) function at the intended frequency? >>

There is a program available as freeware on the net called SPICE, this is a circuit simulation program that accepts as input various transistor models, circuit schematic and the environmental conditions (voltage, temperature, etc.) and produces a result that indicates how fast that circuit will run. SPICE is the original foundation for many of the simulation programs used within the industry (although real simulators are, of course, very different, this is analogous to DOS being the foundation for Windows XP but the idea of it is there)

So the process team estimates the key parameters for what the process will be, and hands this model off to the design team (although it's a work in progress as they continue to tweak the process). The marketing team dictates what the processor should do, what features it should have, what the form factor, power, etc. should be, etc. and passes this on to the design team. The design team then pulls together a plan of what the team will design. Then the various stages of the design start to pull together. Part of this design sequence includes constantly evaluating the design to ensure that it is meeting the frequency target using simulators. If circuitry is too slow, reports are generated and the circuit owner(s) are notified (loudly) by management to fix the problem. Problems arise when you have a specific feature and you have to fit within a certain area and you have a certain power budget and you simply can't meet timing with the constraints given to you. Depending on management, something will give and either the power budget will increase, you will get more area, or something will be de-featured. For example, if you hypothetically have a 1 cycle 64-bit adder, you may add another cycle to it (thus solving the circuit timing problem by giving you twice as long to compute the answer but with a corresponding reduction in performance), or they may increase your power budget allowing more aggressive circuit techniques to be used, or, most rarely of all, your area budget may be increased allowing more flexibility in the design (although this is a two-edged sword, so the area approach is poor from an engineering perspective).



<< If so when all the different blocks are put together resulting in a complete processor schematic which I would assume has further fine tuning, does the actual product get close to hitting the 4GHz mark or would a production product operate at perhaps 3GHz and be fine tuned to eventually hit 4GHz? Or would it likely operate at 4GHz and be fine tuned to (example) 6.5GHz? >>

This depends entirely on how much everyone fudges/sandbags within the design phase, and, at the three companies that I have worked I have seen it go all three ways. If everyone is sandbags your design runs faster than the target. If everyone fudges the numbers to look good to management, your design runs slower than the target and you have to fix it. And if there's a proper balance of everything, you approximately hit your target first time.

Ideally you want to hit your goal correctly - not exceed it, and definitely not miss it. If you exceed your goal you probably had to have drop more features than you needed to to get there. So for example, you might have added wait states/latency on paths that could have been faster. You don't want everyone sandbagging and you definitely don't want anyone fudging. If everyone does their job correctly, then the design should show up very close to the design target. From that point on, you tweak it and try to improve the design features to improve performance, timing, reliability, manufacturability, and fix any issues/errata/bugs that are present.

 

[CTho9305]

spice seems like a cool program, unfortunately the only existing (and free) win32 version is pretty difficult to use.

 

[dajeepster]

<The marketing team dictates what the processor should do>

customer to marketing:
We want it to do this, and we want it as soon as possible.

marketing to engineering:
pissss... can we make it do this?

engineering to marketing:
when pigs fly...:|

marketing to customer:
We have it to you in six months, in addition.. it will also do this..



hmmm.... I think I got the general sequence right...

 

[Shalmanese]

You forgot:

Marketing to Engineers:

you have 6 months to work out an aerial propulsion scheme for swine like objects?

 

[Bozz]

pm: One more question, if you dont mind.

How do you actually design the circuits, do different people do different functions such as one person/group designs block (and sub-block) diagrams linking various sections together, do others actually work at the component level of designing the circuit or do you have predesigned circuits as blocks that you link up and will work with one another. Say you need to create an OR gate, you do insert an OR gate "block" or do you use a couple of transistors to make it work?

Cheers

 

[pm]

<< How do you actually design the circuits, do different people do different functions such as one person/group designs block (and sub-block) diagrams linking various sections together, do others actually work at the component level of designing the circuit or do you have predesigned circuits as blocks that you link up and will work with one another. Say you need to create an OR gate, you do insert an OR gate "block" or do you use a couple of transistors to make it work? >>

How chips are designed depends on the application, company philosophy, time-to-market, power, and other factors. There are plenty of ways to create chips, but the vast majority are created using automated CAD tools. In this scheme the engineers never actually draw the physical mask that the lithography team uses to create the physical chip itself. This function is automated by computer software such as that sold by Cadence, SVRI Synopsys and Mentor Graphics (links are to the actual synthesis products).

You design a functional description of what the chip will do (here's an example of the code for an arithemetic full adder cell that could be used as the basis of, for example, a 32-bit adder in a microprocessor), write code/tests/programs on that will run on this code, and then check that your description works correctly and then you have the synthesis (which takes HDL and create schematics) and place-and-route (which takes schematics and creates the physical mask layers used by the fab) programs due the rest. It's harder than this sounds, but this is the general idea. In this scheme, you have to have something called a library which is a collection of cells used as the lowest level circuit/mask for the chip. So, you'd have an AND cell, and an OR cell, etc. This flow (the way the chip is designed) is probably called "cell-based design" or "synthesized design" although there are other names for various incarnations of this method.

Generally, however, high-end high performance chips use a flow that is called "full-custom". In full-custom you start the same as synthesized design, but once you have the functional (HDL) description you have a team of circuit designers design the circuitry by hand (as opposed to using synthesis tools) and when you have the circuit schematics complete, you have another team (or the same one - depending on the company) draw the actual physical mask of the chip that the manufacturing team use to create the actual chips. Full-custom designs are nearly always faster and smaller than cell-based designs, but they obviously require more time and far more manpower. Microprocessors are nearly always primarily full-custom designs, although subsections are often synthesized and then integrated into the final design.

So in the answer to the original question, whether you have an "OR" block, or a bunch of transistors (6 transistors, to be precise, for a CMOS two-input OR ), depends on whether you are doing full-custom or cell-based design. Intel uses a mix of the two, but I'm a circuit designer and thus usually work on full-custom designs.

 

[Evadman]

<< Finally I would like to thank you for sharing your wealth of knowledge with us , many people would not give us the time of day, it is excellent to see you love your work enough to educate the general public who are interested in this topic! >>


I totaly agree. Thank you very much PM! I thank you for coming back. And to think, we would not have had 90% of this conversation without you. Thank you again.

 

[Eskimo]

<< spice seems like a cool program, unfortunately the only existing (and free) win32 version is pretty difficult to use. >>



There is a free student version of PSPICE which is a graphical implementation of SPICE made by Cadence and is pretty easy to use. It is limited in the number of objects you can place in your layout but a good learning tool I used in college. You can download it at http://www.orcad.com/Product/Simulation/PSpice/eval.asp

 

[DDCSpeed]

they gotta make money every step of the way.

 

[CTho9305]

<<

<< spice seems like a cool program, unfortunately the only existing (and free) win32 version is pretty difficult to use. >>



There is a free student version of PSPICE which is a graphical implementation of SPICE made by Cadence and is pretty easy to use. It is limited in the number of objects you can place in your layout but a good learning tool I used in college. You can download it at http://www.orcad.com/Product/Simulation/PSpice/eval.asp >>



thanks a lot. ngspice still lacks a frontend

 

[Degenerate]

Wow.. This is one of the best threads i have read for a while. Thanks to all.

 

[Valinos]

Great thread...

I wanna work for Intel.

or AMD

 

[Degenerate]

Actually... A thought. from what i read, it seems that the CPU is not perfect. It seems that a part of it (small part like a single transistor or wire in the chip) can be malfunctioning and the CPU can still run? I read in the "Nanotechnoloy" edition of the "Scientific America" Nov edition i think and from what i read, it seems like that the technology right now is smaller than the wavelength of the light, therefore error are more common, caused by the diffraction of light. This to me results in a "errorous" final chip. Is there something wrong with my thinkinh? because it seems that a CPU running so fast (for today ) wont run if just one tiny part of is not running properly; or is there another way around this problem - similar to the way scratched CD's can still work by reading data around the damged part and deducing the original data.

 

[pm]

<< Actually... A thought. from what i read, it seems that the CPU is not perfect. It seems that a part of it (small part like a single transistor or wire in the chip) can be malfunctioning and the CPU can still run? >>

I would say that this is fairly rare, but yes it is possible. If the problem is in a section of the cache, the manufacturer can swap in redundant cache to replace the faulty section. If the problem is in test/debug/non-customer-visible circuitry then the customer will never notice, and the manufacturer probably doesn't care. But I would say that this is fairly rare. Nearly every CPU that is sold (by any CPU manufacturer) will have all several million transistors working correctly.


<< I read in the "Nanotechnoloy" edition of the "Scientific America" Nov edition i think and from what i read, it seems like that the technology right now is smaller than the wavelength of the light, therefore error are more common, caused by the diffraction of light. >>


I wouldn't say that errors are more common than they used to be. In fact, they are more rare. Yields on typical 0.25um and 0.18um at most companies are higher than those same companies got on 1um, 1.5um, etc. Diffraction of light is a well understood effect. If you have the same mask the light will always behave the same, so it doesn't lead to errors because you tweak the mask so that the diffracted light still creates the pattern that you want it to. The things that cause lithography errors tend to be impurities - which are fairly uncommon today and this is why yields are pretty high relative to a decade ago.

 

[Eskimo]

<< [I wouldn't say that errors are more common than they used to be. In fact, they are more rare. Yields on typical 0.25um and 0.18um at most companies are higher than those same companies got on 1um, 1.5um, etc. Diffraction of light is a well understood effect. If you have the same mask the light will always behave the same, so it doesn't lead to errors because you tweak the mask so that the diffracted light still creates the pattern that you want it to. The things that cause lithography errors tend to be impurities - which are fairly uncommon today and this is why yields are pretty high relative to a decade ago. >>



Yes, but I think what Degenerate was referring to is the fact that in today's world of sub wavelength lithography process engineers are faced with tighter tolerances and less process latitude than ever before. Even using techniques such as off-axis illumination and phase shift masks lithographers are presented with smaller depth of focus ranges than they are historically used to. But on the other hand tools today are much better in both sensitivity and repeatibility allowing process engineers to dial in their settings more accurately. So yes today's sub wavelength lithography does present us with increased challenges, but we meet those challenges with increased innovation and invention.

 

[jmitchell]

PM and everyone else, great info, thanks for the replies. And to those of you who flamed me, you sound like my nagging ex girlfriend... Dont forget that there is a huge marketing machine behind Intel's doors. My initial question was pretty much prompted by the 'roadmaps' that I've seen. I wondered, how can Intel know that they are going to hit 3.5 ghz by xx/xx/xxxx date? For them to know what speed their cpu's will be at in 9 months, they would have to know what was keeping them from being there. If they knew what the limiting factors were, wouldnt they fix them and release the 3.5 in 2 months instead of 10 months? That was the basis of my question. PM's information was very useful, as know we know a great deal more about the engineering/design process, and how it relates to chips hitting higher clock speeds. I know that marketing and profits still affect when we see the cpu's, although with much less impact than I had previously conceived. Thanks again-


oh and mr CTho9305, you said-

--he's trying to drive away all the knowledgeable people who have actual experience in the stuff we talk about.
(^ "actual experience" referring to pm, "he" referring to the one who flamed)--

I beg of you to refresh my memory as to when I flamed... dont be surprised if you find it difficult.

 

[pm]

<< And to those of you who flamed me, you sound like my nagging ex girlfriend... Dont forget that there is a huge marketing machine behind Intel's doors. >>

I'm not sure if I can think of another billion dollar company that sells a commoditized product (as opposed to non-commidity items like heavy machinery) that does not have a "huge marketing machine" behind it's doors.

 

[Degenerate]

Sony!!! I see to many sony adds that i think its just normal TV.