- Apr 16, 2008
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Hello everyone.
This will be highly technical. I like to see if it is possible to design integrated CPU+TPU, like CTPU,
CPU includes (wikipedia):
both communicate with a integrated bus
Any comments are appreciated.
This will be highly technical. I like to see if it is possible to design integrated CPU+TPU, like CTPU,
CPU includes (wikipedia):
- datapaths (such as ALUs and pipelines)
- control unit: logic which controls the datapaths
- Memory components such as register files, caches
- Clock circuitry such as clock drivers, PLLs, clock distribution networks
- Pad transceiver circuitry
- Logic gate cell library which is used to implement the logic
- Unify buffer
- Matrix Multiply unit
- Accumulators - sharing wtih ALU
both communicate with a integrated bus
Any comments are appreciated.