- Dec 25, 2013
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David Schor from WikiChip:
Charlie also says:
https://twitter.com/david_schor/status/988107149036478464
A couple days ago, Ashraf also posted this story: https://twitter.com/TMFChipFool/status/987286420132958208
Lastly, former Principal Engineer Francois Piednoel has also weighed in (he says the problem will be fixed "shortly"): https://twitter.com/FPiednoel/with_replies
For the record, this is what Mark Bohr said in May last year.
I really have no idea at all how Intel screwed up this badly. I am completely baffled. The phrase "10nm is broken" isn't an overstatement.
David Schor said:I hope I am wrong but I have good reasons to believe there won't be ANY 10nm volume this year at all. From what I heard, I really hope they have a "Champagne Lake" (made up name) lined up for 2019. They are going to need it.
Everything is true here:
Charlie Demerjian said:There are three distinct problems with #Intel 10nm process that I know of. I am willing to bet there are many more. Of the three only one has a solution that I am aware of, and that was the easy one.
Charlie also says:
Let me explain this. Intel's 10nm process is years late, underperforming, and PR has curious explanations. I have heard about 3 distinct issues leading to the borking, but I have no doubt those are the only issued facing bringing 10nm to market.
Of those three, I have directly heard one has been root caused, a fix was made, and the fix did what it should have. So in short there were 3 problems each of which crippled 10nm chips. Now there are two remaining, and again with the caveat of, "that I know about"
https://twitter.com/david_schor/status/988107149036478464
A couple days ago, Ashraf also posted this story: https://twitter.com/TMFChipFool/status/987286420132958208
Ashraf Eassa said:A story about Intel process tech, sit down, my followers, and enjoy.
1/ Apparently, a while back, Intel hired outside consultants to benchmark their progress against the foundries. Those consultants informed Intel that they were behind the foundries in some key areas.
2/ Intel, of course, believing in its own superiority basically didn't take the outside consultants seriously, thinking they were full of shit.
3/ Later on, Intel would start to get clues from key semiconductor equipment makers. Intel would, I am told, refuse help from these equipment makers, again believing in its own superiority.
4/ Eventually, when the equipment makers started to tell Intel things like, "we're surprised you're still struggling with Problem XYZ because Competitor X/Y figured that out a while go..." did Intel finally start to become more receptive to input.
5/ This story points to a fundamental problem within Intel: They actually believe their own marketing bullshit about being way ahead of the foundries -- it's a corporate culture thing. This arrogance hurts them -- badly.
Some additional info on Intel 10nm: Intel is trying its absolute best to get things working, they are, from what I hear, sparing no expense on 10nm and they are literally trying everything, even going to far as to pull unproven experimental stuff from the research labs.
One thing is clear: Intel 10nm is the biggest process related disaster in the company's history, it really makes the 14nm struggles look like a walk in the park by comparison. It is truly a horror show for this process.
Lastly, former Principal Engineer Francois Piednoel has also weighed in (he says the problem will be fixed "shortly"): https://twitter.com/FPiednoel/with_replies
Francois Piednoel said:You are confusing marketing “naming” of the process and the transistor performance at peak performance level. There are still no match for intel 14nm++ transistor,I can bet a lot that you will see a huge increase in idle power of this new 7nm. What Apple ship in 2018 will tell
You guys will did not learn what happen when intel is in trouble? They set up dungeons, super secretive ones, then, they go dark, for Core2Duo, we were 10 with the real story, the rest of the world was predicting AMD taking over.
Today, I agree that there was management mistake, ICL should have been pull down to 14nm++, process tech should not hold back architecture, but that should tell you that chipzilla is now planning a double whammy, and when this will come out, that is going to break teeth.
And historically, it is a very bad idea to bid again intel recovering, they always do, because that their scale, there are excellent people, the management of nice guys just need to empower them, instead of protecting their sits. IDC here I come again ...
So, when you “hear” stuffs , you most likely hear from an non inform person, so, value is useless, I remember being in meeting with intel senior fellows and not being able to tell them what was going on with Core2Duo, and being destroyed because Cedarmill was sucking ass at SSE3
Few days before we showed Core2Duo to the press for the 1st time, most of intel Top management had no clue. Slowly, those VPs got moved outside intel or retired, I predict this is going to happen again. (Please don’t ask names, they are pretty obvious, but by respect , don’t)
I was in the meeting when we canned Tejas. My friends worked hard on that, it was a cathedral of architecture, sadly, the physic limits killed it, many ideas got recycled in processors you use today. Most people miss-understand what was Tejas, because the fanboys only know the name.
I know the reason of all of those delays, but I can't say it because I am under NDA. It is fixable, and my estimate is that it should be fixed shortly.
Yes, the people working on C2D were in IDC, and the information about the performance of C2D was "roomed", non of the Oregon team had any clue of what was coming (except one apple related), because you did not want to discourage the guys trying to make netbust go faster.
Fellows are very smart, very very smart (There are exceptions ... don't ask ;-) , but if they don't need to know, they don't get to know, especially if you plan to wipe competition as C2D did.
My lawyer agree that in 2019, my knowledge of what is going on at intel will be less significant, and I will be allowed to start speaking.
The ARM camps has for sure won the "perception" battle, at least the "nm" naming battle, those 2 slides are comparing and , on the top of this, non of those graph tell you about the Cdyn other important factors, or leakage at high voltage and low voltage, it is to compare
Keep in mind that increasing IPC is not linear to the increase of transistors,the amount of IPC increase will depend on a lot of simulation, how accurate they are, and the scale of your R&D, this is where IPC increase is going. Now,chipzilla has 3 years of architecture to release
For the record, this is what Mark Bohr said in May last year.
Mark Bohr said:We’re on track to begin shipping 10nm products in the second half of this year. 7nm technology is already well into its development phase, so I know it will happen. And I’m spending most of my time on our 5nm technology, and we have some interesting and viable ideas to make that happen.
I really have no idea at all how Intel screwed up this badly. I am completely baffled. The phrase "10nm is broken" isn't an overstatement.
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