el etro
Golden Member
- Jul 21, 2013
- 1,581
- 14
- 81
Oh, that's not good. Now there might come a bunch of replies, that these numbers are made up, DMIPS is old and doesn't reflect the improved NEON, that it's actually just 30% and 90% of it are the result of the new process, etc.
But actually in that chip with a decent RAM interface (even supporting DDR4, IIRC) and L2 cache those ARM cores might actually get something to do. How many ARM SoCs have RAM buses wider than 64 bit?
Dresdenboy, what do you think about an hybrid x86/ARM APU or Excavator/Beema APU (Big.little stile) for the mainstream/value consumer? Could this make benefits in battery life time for make the notebook APUs compete to Intel's(competing with intel and their advanced manufacturing processes is very hard in notebook space is very hard this round)??